TDA4850 datasheet(8/20 Pages) PHILIPS

8 / 20 page

1997 Jun 05

Philips Semiconductors

Product speciﬁcation

Horizontal and vertical deﬂection controller

for VGA/XGA and multi-frequency monitors

TDA4850

CHARACTERISTICS

VP = 12 V; Tamb =25 °C; measurements taken in Fig.6; unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

supply voltage (pin 1)

9.2

supply current

−

Internal reference voltage

Vref

internal reference voltage

6.0

6.25

6.5

temperature coefﬁcient

Tamb = 20 to 100 °C

−−±90

10−6/K

PSRR

power supply ripple rejection

f = 1 kHz sine wave

−

f = 1 MHz sine wave

−

supply voltage (pin 1) to ensure all internal

reference voltages

9.2

−

Composite sync input (AC-coupled; V10 =5V)

Vi sync

sync amplitude of video input signal (pin 9)

sync on green;

RS =50 Ω

−

300

−

top sync clamping level

1.1

1.32

1.5

slicing level above top sync level

120

150

allowed source resistance for 7% duty cycle Vi sync > 200 mV

−−

1.5

Ω

differential input resistance

during sync

−

−Ω

charging current of coupling capacitor

V9 > 1.5 V

1.7

2.6

3.4

µA

tint

vertical sync integration time to generate

sync pulse

710

µs

Horizontal sync input (DC-coupled, TTL-compatible)

Vi sync

sync input signal (peak value; pin 9)

1.7

−−

slicing level

1.2

1.4

1.6

minimum pulse width

700

−−

tr, tf

rise time and fall time

−

500

input current

V9 = 0.8 V

−−−200

µA

V9 = 5.5 V

−−

µA

Automatic horizontal polarity switch (H-sync on pin 9)

tpH/tH

horizontal sync pulse width related to tH

(duty cycle for automatic polarity correction)

−−

delay time for changing sync polarity

0.3

−

1.8

Vertical sync input (DC-coupled, TTL-compatible; V-sync on pin 10)

Vi sync

sync input signal (peak value; pin 10)

1.7

−−

slicing level

1.2

1.4

1.6

I10

input current

0 < V10 < 5.5 V

−−±10

µA

tpV

maximum vertical sync pulse width for

automatic vertical polarity switch

−−

300

µs

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