TDA4841 datasheet(25/60 Pages) PHILIPS

25 / 60 page

1999 Oct 25

Philips Semiconductors

Product speciﬁcation

I2C-bus autosync deﬂection controller for

PC monitors

TDA4841PS

VOLTAGE COMPARATOR: PIN BSENS

Vi(BSENS)

voltage range of positive

comparator input

−

Vi(BOP)

voltage range of negative

comparator input

−

ILI(BSENS)(max)

maximum leakage current

discharge disabled

−−−2

µA

OPEN-COLLECTOR OUTPUT STAGE: PIN BDRV

Io(BDRV)(max)

maximum output current

note 13

−−

ILO(BDRV)

output leakage current

VBDRV =16V

−−

µA

Vsat(BDRV)

saturation voltage

Io(BDRV) <20mA

−−

300

toff(BDRV)(min)

minimum off-time

−

250

−

td(BDRV-HDRV)

delay between BDRV pulse and

HDRV pulse

measured at

VHDRV =VBDRV =3V

−

500

−

BSENS DISCHARGE CIRCUIT: PIN BSENS

VSTOP(BSENS)

discharge stop level

capacitive load;

IBSENS = 0.5 mA

0.85

1.0

1.15

Idch(BSENS)

discharge current

VBSENS > 2.5 V

4.5

6.0

7.5

Vth(BSENS)(restart)

threshold voltage for restart

fault condition

1.2

1.3

1.4

CBSENS(min)

minimum value of capacitor at

BSENS (pin 4)

−−

Internal reference, supply voltage, soft start and protection

VCC(stab)

external supply voltage for

complete stabilization of all

internal references

9.2

−

ICC

supply current

−

ICC(stb)

standby supply current

STDBY = 1; VPLL2 <1V;

3.5V<VCC <16V

−

PSRR

power supply rejection ratio of

internal supply voltage

f = 1 kHz

−−

VCC(blank)

supply voltage level for

activation of continuous

blanking

VCC decreasing from 12 V

8.2

8.6

9.0

VCC(blank)(min)

minimum supply voltage level

for function of continuous

blanking

VCC decreasing from 12 V

2.5

3.5

4.0

Von(VCC)

supply voltage level for

activation of HDRV, BDRV,

VOUT1, VOUT2 and

HUNLOCK

VCC increasing from below

typical 8.1 V

7.9

8.3

8.7

Voff(VCC)

supply voltage level for

deactivation of BDRV, VOUT1,

VOUT2 and HUNLOCK; also

sets register SOFTST

VCC decreasing from

above typical 8.3 V

7.7

8.1

8.5

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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