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LD7592GS датащи(PDF) 9 Page - Leadtrend Technology |
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LD7592GS датащи(HTML) 9 Page - Leadtrend Technology |
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9 / 15 page ![]() LD7592 06/05/2017 9 Leadtrend Technology Corporation www.leadtrend.com.tw LD7592-DS-00 June 2017 Application Information Operation Overview The LD7592 is an excellent voltage mode PFC controller. It meets the IEC61000-3-2 requirement and is intended for the use in those pre-regulator that demands low power harmonics distortion. It integrates more functions to reduce the external components counts and the size. Its major features are described as below. Under Voltage Lockout (UVLO) An UVLO comparator is implemented in it to detect the voltage on the VCC pin. It would assure the supply voltage enough to turn on the LD7592 PFC controllers and further to drive the power MOSFET. As shown in Fig. 8, a hysteresis is built in to prevent the shutdown from the voltage dip during start up. The turn-on and turn-off threshold level are set at 12.0V and 7.5V, respectively. Vcc UVLO(on) UVLO(off) t t I(Vcc) startup current (~µA) operating current (~ mA) Fig. 8 Startup Current and Startup Circuit The typical startup circuit to generate the LD7592 VCC is shown in Fig. 9. During the startup transient, the VCC is lower than the UVLO threshold. Thus, there is no gate pulse produced from LD7592 to drive power MOSFET. Therefore, the current through R1 will provide the startup current and charge the capacitor C1. Whenever the VCC voltage is high enough to turn on the LD7592 and further to deliver the gate drive signal, the supply current is provided from the auxiliary winding of the PFC choke. Lower startup current requirement on the PFC controller will help to increase the value of R1 and then reduce the power consumption on R1. By using CMOS process and the special circuit design, the maximum startup current of LD7592 is only 1 A. If a higher resistance value of R1 is chosen, it usually takes more time to start up. To carefully select the value of R1 and C1 will optimize the power consumption and startup time. LD7592 OUT CS GND COMP VCC RAMP INV OVP Vin R1 C1 Fig. 9 Output Voltage Setting The LD7592 monitors the output voltage signal at INV pin through a resistor divider pair Ra and Rb. A transconductance amplifier is used instead of the conventional voltage amplifier. The transconductance amplifier (voltage controlled current source) aids the implementation of OVP and disables function. The output current of the amplifier changes according to the voltage difference of the inverting and non-inverting input of the amplifier. The output voltage of the amplifier is compared with the internal ramp signal to generate the turn-off signal. The output voltage is determined by the following relationship. ) Rb Ra 1 ( V 5 . 2 V O (V) |
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