EPR-32 datasheet(6/36 Pages) POWERINT

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EPR-32 - 25 W Multiple Output TOP245P Supply

13-Jul-06

Page 6 of 36

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Circuit Description

This design features the TOP245P device from the TOPSwitch-GX IC family. By using

the PC board to provide heatsinking, the need for an external heatsink is eliminated,

removing the cost of the heatsink and associated assembly costs.

To provide <0.1 W no-load consumption, current mode control with variable frequency

operation is implemented using the X pin feature of the TOPSwitch-GX. In designs

where 0.5 W no-load is acceptable, the X pin control components can be removed,

relying on the standard voltage mode control via the CONTROL pin. More details of this

operation is provided below.

An optional secondary side discrete shunt regulator provides a low cost and efficient (no

heatsink required) method of meeting the tight regulation requirements of maximum load

on either the 5 V or 3.3 V outputs while the other is at minimum load. In designs where

the minimum and maximum loads on the 3.3 V and 5 V output occur at the same time,

this circuit can easily be removed.

4.1

Input EMI Filtering

Conducted EMI filtering is provided by C3, C1, L1, and C4. The switching frequency jitter

feature of the TOPSwitch-GX family allows the use of a small, low cost common mode

choke for L1 and reduces the value of C3 needed to meet EN55022 / CISPR22 Class B

with good margin. A safety rated Y capacitor bridges the isolation barrier from the

rectified DC rail to output return. This returns common mode EMI currents generated by

the primary and secondary switching waveforms, reducing conducted EMI. EMI results

are presented in a later section of this document. Returning the Y capacitor to the DC rail

ensures high currents present during line transients are routed away from U1.

4.2

TOPSwitch-GX Primary

The universal AC input (85 VAC to 265 VAC) is rectified and filtered by D1-D4, C1 and

C2. To limit inrush current and prevent damage to D1-D4, a thermistor RT1 is used. In

addition, an MOV (or VDR), RV1, provides differential surge protection.

The rectified DC rail is applied to one end of the transformer primary, the other end being

connected to the DRAIN pin of the integrated MOSFET of U1.

To keep the peak DRAIN voltage acceptably below the BVDSS (700 V) of U1, diode D5,

R7, VR1, C2, and R1 form a primary clamp. This network clamps the voltage spike seen

on the DRAIN due to primary and secondary reflected leakage inductance. Capacitor C2

together with R1 form the main clamp with VR1 providing a hard limit for the maximum

voltage seen across the primary. Resistor R7 ensures that VR1 only conducts at the end

of the leakage inductance spike event, limiting dissipation. Diode D5 is deliberately

selected as a slow recovery type, but must be a glass-passivated type to guarantee the

reverse recovery time as defined by the manufacturer. Standard 1N4007 diodes should

not be used as their potential for very long reverse recovery times can cause excessive

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