TDA3604TH datasheet(6/20 Pages) PHILIPS

6 / 20 page

1997 Aug 21

Philips Semiconductors

Product speciﬁcation

Multiple voltage regulators with external

reset delay and switch

TDA3604Q; TDA3604TH

FUNCTIONAL DESCRIPTION

The TDA3604Q and TDA3604TH are multiple output

voltage regulators with a power switch, intended for use in

car radios with or without a microcontroller. Because of

low-voltage operation of the car radio, low-voltage drop

regulators are used.

Regulator 2 will switch on when the supply voltage

exceeds 6.5 V for the first time and will switch off again

when the output voltage of regulator 2 drops below 1.9 V

(this is below an engine start). When regulator 2 is

switched on and the output voltage of this regulator is

within its voltage range, the reset output will be enabled

(reset will go HIGH via a pull-up resistor) to generate a

reset to the microcontroller. The reset cycles can be

extended by an external capacitor at CRES (pin of the reset

delay capacitor). The above mentioned start-up feature is

built-in to secure a smooth start-up of the microcontroller

at first connection, without uncontrolled switching of

regulator 2 during the start-up sequence.

When both regulator 2 and the supply voltage (VP > 4.5 V)

are available, regulator 1 and the power switch can be

operated by the enable inputs Ven(REG1) and Ven(sw)

respectively.

All output pins are fully protected. The regulators are

protected against load dump (regulator 1 will switch off at

supply voltages higher than 25 V) and short-circuit

(foldback current protection).

The power switch contains a current protection which is

delayed for

≥10 ms (in short-circuit condition). During this

time the current is limited to 1.4 A (VP ≤ 18 V).

At supply voltages over 16.9 V the power switch is

clamped at 15.0 V (to avoid externally connected circuitry

being damaged by an overvoltage) and the power switch

will switch off at load dump.

Interfacing with the microcontroller can be accomplished

by an ignition Schmitt trigger and ignition output buffer,

(simple full/semi on/off logic applications).

The total timing of a semi on/off logic set is shown in Fig.4.

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