TDA1545 datasheet(8/20 Pages) PHILIPS

8 / 20 page

1997 Sep 04

Philips Semiconductors

Preliminary speciﬁcation

Stereo continuous calibration DAC

TDA1545A

CHARACTERISTICS

VDD =5V; Tamb =25 °C; measured in the circuit of Fig.1; unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

VDD

supply voltage

3.0

5.0

5.5

IDD

supply current

note 1

−

3.0

4.0

ripple rejection

note 2

−

Digital inputs (WS; BCK; DATA)

|IIL|

input leakage current LOW

VI = 0.8 V

−−

µA

|IIH|

input leakage current HIGH

VI = 2.4 V

−−

µA

fBCK

bit clock input frequency

−−

18.4

MHz

bit rate data input

−−

18.4

Mbits/s

fWS

word select input

−−

384

kHz

Timing (see Fig.5)

rise time

−−

fall time

−−

tCY

bit clock cycle time

−−

tHB

bit clock HIGH time

−−

tLB

bit clock LOW time

−−

tSU;DAT

data set-up time

−−

tHD;DAT

data hold time

−−

tHD;WS

word select hold time

−−

tSU;WS

word select set-up time

−−

Analog input (IREF)

RREF

reference resistor

see Fig.1

7.4

11.0

14.6

Ω

Analog outputs (IOL and IOR)

RES

resolution

−−

bit

VDCC

DC output voltage compliance

2.0

−

VDD − 1V

IFS

full-scale current

0.9

1.0

1.1

TCFS

full-scale temperature coefﬁcient

−±400

−

ppm

Ibias

bias current

643

714

785

µA

AFS

reference input current to

full-scale output current gain

−

13.2

−

Abias

reference input current to bias

current gain

−

9.42

−

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