LTC4215 datasheet(13/24 Pages) LINER

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LTC4215

4215fb

APPLICATIO S I FOR ATIO

An overcurrent fault occurs when the circuit breaker 25mV

threshold has been exceeded for longer than the 20µs time-

out delay. Current limiting begins immediately when the cur-

rent sense voltage between the VDDandSENSEpinsreaches

75mV. The GATE pin is then brought down and regulated in

order to limit the current sense voltage to 75mV. When the

20µs circuit breaker time out has expired, the overcurrent

present bit C2 is set. The external MOSFET is turned off and

the overcurrent fault bit D2 is set at this time.

After the MOSFET is turned off, the TIMER capacitor

begins discharging with a 2µA pulldown current. When

the TIMER pin reaches its 0.2V threshold the MOSFET is

allowed to turn on again if the overcurrent fault has been

cleared. However, if the overcurrent auto-retry bit, A2 has

been set then the MOSFET turns on again automatically

without resetting the overcurrent fault. Use a minimum

value of 10nF for CT. If the TIMER pin is bypassed by tying

it to INTVCC, the part is allowed to turn on again after an

internal 5 second timer has expired, in the same manner

as the TIMER pin passing its 0.2V threshold.

Undervoltage Fault

An undervoltage fault occurs when the UV pin falls below

its 1.235V threshold for more than 2µs. This turns off the

GATE with a 1mA current to ground and sets undervoltage

present bit C1 and undervoltage fault bit D1. If the UV pin

subsequently rises above the threshold for 100ms, the

GATE is turned on again unless undervoltage auto-retry

has been disabled by clearing bit A1. When power is ap-

plied to the device, if UV is below its 1.235V threshold after

INTVCC crosses its 2.64V undervoltage lockout threshold,

an undervoltage fault is logged in the fault register.

Board Present Change of State

Whenever the

⎯E⎯N pin toggles, bit D4 is set to indicate a

change of state. When the

⎯E⎯N pin goes high, indicating

board removal, the GATE turns off immediately (with a 1mA

current to ground) and clears the board present bit, C4. If

the

⎯E⎯N pin is pulled low, indicating a board insertion, all

fault bits except D4 are cleared and enable bit, C4, is set.

If the

⎯E⎯N pin remains low for 100ms the state of the ON

pin is captured in ‘FET On’ control bit A3. This turns the

switch on if the ON pin is tied high. There is an internal

10µA pull-up current source on the

⎯E⎯N pin.

If the system shuts down due to a fault, it may be desirable

to restart the system simply by removing and reinserting

a load card. In cases where the LTC4215 and the switch

reside on a backplane or midplane and the load resides on

a plug-in card, the

⎯E⎯N pin detects when the plug-in card is

removed. Figure 4 shows an example where the

⎯E⎯N pin is

used to detect insertion. Once the plug-in card is reinserted

the fault register is cleared (except for D4). After 100ms

the state of the ON pin is latched into bit A3 of the control

If a connection sense on the plug-in card is driving the

⎯E⎯N

pin, insertion or removal of the card may cause the pin

voltage to bounce. This results in clearing the fault register

when the card is removed. The pin may be debounced

using a ﬁlter capacitor, CEN, on the ⎯E⎯N pin as shown in

Figure 4. The ﬁlter time is given by:

tFILTER = CEN • 123 (ms/µF)

Figure 3. Short-Circuit Waveforms

VGATE

10V/DIV

VSOURCE

10V/DIV

VDD

10V/DIV

ILOAD

10A/DIV

µs/DIV

4215 F03

RS = 5mΩ

CL = 0

RSHORT = 1Ω

R6 = 30k

C1 = 0.1

µF

Overvoltage Fault

An overvoltage fault occurs when either the OV pin rises

above its 1.235V threshold, or the VDD pin rises above its

15.6V threshold, for more than 2µs. This shuts off the GATE

with a 1mA current to ground and sets the overvoltage

present bit C0 and the overvoltage fault bit D0. If the pin

subsequently falls back below the threshold for 100ms,

the GATE is allowed to turn on again unless overvoltage

auto-retry has been disabled by clearing bit A0.

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