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RT5752 датащи(PDF) 21 Page - Richtek Technology Corporation |
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RT5752 датащи(HTML) 21 Page - Richtek Technology Corporation |
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21 / 32 page ![]() RT5752 21 DS5752-03 November 2023 www.richtek.com © Copyright 2023 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Figure 4. CIN Ripple Voltage and Ripple Current CIN Ripple Current CIN Ripple Voltage VCIN (1-D) x IOUT D x IOUT (1-D) x tSW D x tSW VESR = IOUT x ESR In addition, the input capacitor needs to have a very low ESR and must be rated to handle the worst-case RMS input current of : OUT IN RMS OUT_MAX IN OUT V V I I 1 VV It is common to use the worse IRMS ≅ IOUT/2 at VIN = 2VOUT for design. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further de-rate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size, height and thermal requirements in the design. For low input voltage applications, sufficient bulk input capacitance is needed to minimize transient effects during output load changes. Ceramic capacitors are ideal for switching regulator applications because of its small size, robustness and very low ESR. However, care must be taken when these capacitors are used at the input. A ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. If the RT5752 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the device's rating. This situation is easily avoided by placing the low ESR ceramic input capacitor in parallel with a bulk capacitor with higher ESR to damp the voltage ringing. The input capacitor should be placed as close as possible to the VIN pins, with a low inductance connection to the GND of the IC. In addition to a larger bulk capacitor, a small ceramic capacitors of 0.1 μF should be placed close to the VIN and GND pin. This capacitor should be 0402 or 0603 in size. Output Capacitor Selection The RT5752 are optimized for ceramic output capacitors and best performance will be obtained by using them. The total output capacitance value is usually determined by the desired output voltage ripple level and transient response requirements for sag (undershoot on load apply) and soar (overshoot on load release). Output Ripple The output voltage ripple at the switching frequency is a function of the inductor current ripple going through the output capacitor's impedance. To derive the output voltage ripple, the output capacitor with capacitance, COUT, and its equivalent series resistance, RESR, must be taken into consideration. The output peak-to-peak ripple voltage VRIPPLE, caused by the inductor current ripple ΔIL, is characterized by two components, which are ESR ripple VRIPPLE(ESR) and capacitive ripple VRIPPLE(C), and can be expressed as below : RIPPLE RIPPLE(ESR) RIPPLE(C) RIPPLE(ESR) L ESR L RIPPLE(C) OUT SW V = V V V = I R I V = 8C f If ceramic capacitors are used as the output capacitors, both the components need to be considered due to the extremely low ESR and relatively small capacitance. Output Transient Undershoot and Overshoot In addition to voltage ripple at the switching frequency, the output capacitor and its ESR also affect the voltage sag (undershoot) and soar (overshoot) when the load steps up and down abruptly. The ACOT® transient response is very quick and output transients are usually small. The following section shows how to calculate the worst-case voltage swings in response to very fast load steps. The output voltage transient undershoot and overshoot each have two components : the voltage steps caused by the output capacitor's ESR, and the voltage sag and soar due to the finite output capacitance and the inductor current slew rate. Use the following formula to check if the ESR is low enough (typically not a problem with ceramic |
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