PLL602-03

Low Phase Noise CMOS XO (48MHz to 100MHz)

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 2

PIN DESCRIPTIONS

Name

Number

Type

Description

CLK

1

O

Output clock.

VDD

2

P

power supply.

OE

3

I

Output enable input. Disables (tri-state) output when low. Internal pull-up

enables output by default if pin is not connected to low.

XIN

4

I

Crystal input. See Crystal Specification on page 3.

XOUT

5

I

Crystal output. See Crystal Specification on page 3.

N/C

6

-

Not connected.

GND

7, 8

P

Ground.

ELECTRICAL SPECIFICATIONS

1. Absolute Maximum Ratings

PARAMETERS

SYMBOL

MIN.

MAX.

UNITS

Supply Voltage

4.6

V

Input Voltage, dc

-0.5

V

Output Voltage, dc

-0.5

V

Storage Temperature

-65

150

°C

Ambient Operating Temperature*

-40

85

°C

Junction Temperature

125

°C

Lead Temperature (soldering, 10s)

260

°C

ESD Protection, Human Body Model

2

kV

Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the

device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-

ditions above the operational limits noted in this specification is not implied.

* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.

2. DC Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Supply Current, Dynamic, with

Loaded Outputs

Output load of 10pF

16

20

mA

Operating Voltage

2.97

3.63

V

30

mA

Output drive current

(High Drive)

30

mA

10

mA

Output drive current

(Standard Drive)

10

mA

Short Circuit Current

±50

mA