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PL560-37 датащи(PDF) 13 Page - PhaseLink Corporation

номер детали PL560-37
подробное описание детали  Analog Frequency Multiplier
PDF  15 Pages
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производитель  PLL [PhaseLink Corporation]
домашняя страница  http://www.phaselink.com
Logo PLL - PhaseLink Corporation

PL560-37 датащи(HTML) 13 Page - PhaseLink Corporation

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Analog Frequency Multiplier
PL560-xx VCXO Family
47745 Fremont Blvd., Fremont, CA 94538 TEL (510) 492-0990, FAX (510) 492-0991
www.phaselink.com
Rev.:02-09-07 Page 13
PACKAGE PIN DESCRIPTION AND ASSIGNMENT
2X AFM Package Pin Out
4X AFM Package Pin Out
PIN ASSIGNMENTS
Name
Pin#
Type
Product
Description
OSCOFFSEL
1
I
2X & 4X
Set to “0” (GND) to choose to turn off the oscillator when outputs are disabled (OE). Default (no
connect) is OSC always on.
GNDOSC
2
P
2X & 4X
GND connection for oscillator circuitry.
VCON
3
I
2X & 4X
Control Voltage input. Use this pin to change the output frequency by varying the applied Control
Voltage.
XIN
4
I
2X & 4X
Input from crystal oscillator circuitry.
XOUT
5
O
2X & 4X
Output from crystal oscillator circuitry.
OE
6
I
2X & 4X
Output Enable input (see "OE LOGIC SELECTION TABLE").
DNC
2X
Do Not Connect.
L4X
7
I
4X
External inductor connection. The inductor is recommended to be a high Q small
size 0402 or 0603 SMD component, and must be placed between L4X and adjacent
VDDOSC. Place inductor as close to the IC as possible to minimize parasitic effects
and to maintain inductor Q. This inductor is used with 4X AFMs.
GNDANA
2X
GND connection.
VDDOSC
8
P
4X
VDD connection for oscillator circuitry. VDDOSC should be separately decoupled from other
VDDs whenever possible.
GNDBUF
9
P
2X & 4X
GND connection for output buffer circuitry.
Q
10
O
2X & 4X
PECL/LVDS or CMOS output.
QBAR
11
O
2X & 4X
Complementary PECL/LVDS output or in phase CMOS.
VDDBUF
12
P
2X & 4X
VDD connection for output buffer circuitry. VDDBUF should be separately decoupled from other
VDDs whenever possible.
VDDANA
13
P
2X & 4X
VDD connection for analog circuitry. VDDANA should be separately decoupled from other VDDs
whenever possible.
OESEL
14
I
2X & 4X
Selector input to choose the OE control logic (see “OE SELECTION TABLE”). Internal pull-down.
VDDOSC
15
P
2X & 4X
VDD connection for oscillator circuitry. VDDOSC should be separately decoupled from other
VDDs whenever possible.
L2X
16
I
2X & 4X
External inductor connection. The inductor is recommended to be a high Q small
size 0402 or 0603 SMD component, and must be placed between L2X and adjacent
VDDOSC. Place inductor as close to the IC as possible to minimize parasitic effects
and to maintain inductor Q.
1
2
3
4
5
6
7
8
OSCOFFSEL
9
10
11
12
13
14
15
16
GNDOSC
VCON
XIN
XOUT
OE
L4X
VDDOSC
L2X
VDDOSC
OESEL
VDDANA
VDDBUF
QBAR
Q
GNDBUF
P560-0X
VDDOSC
OE
XOUT
L4X
1
2
3
4
12
11
10
9
13
14
15
16
8
7
6
5
OESEL
VDDANA
VDDOSC
L2X
1
2
3
4
5
6
7
8
OSCOFFSEL
9
10
11
12
13
14
15
16
GNDOSC
VCON
XIN
XOUT
OE
DNC
GNDANA
L2X
VDDOSC
OESEL
VDDANA
VDDBUF
QBAR
Q
GNDBUF
P560-4X
GNDANA
OE
XOUT
DNC
1
2
3
4
12
11
10
9
13
14
15
16
8
7
6
5
OESEL
VDDANA
VDDOSC
L2X



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