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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SST26VF032B датащи(PDF) 34 Page - Microchip Technology |
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SST26VF032B датащи(HTML) 34 Page - Microchip Technology |
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34 / 82 page  SST26VF032B/SST26VF032BA DS20005218K-page 34 2013-2022 Microchip Technology Inc. and its subsidiaries 5.32 Write Disable (WRDI) The Write Disable (WRDI) instruction sets the Write- Enable Latch bit in the STATUS register to ‘0’, prevent- ing write operations. The WRDI instruction is ignored during any internal write operations. Any write opera- tion started before executing WRDI will complete. Drive CE# high before executing WRDI. To execute a Write Disable, the host drives CE# low, sends the Write Disable command cycle (04H), then drives CE# high. See Figure 5-34 and Figure 5-35. FIGURE 5-34: WRITE DISABLE (WRDI) SEQUENCE (SQI) FIGURE 5-35: WRITE DISABLE (WRDI) SEQUENCE (SPI) MODE 3 0 1 SCK SIO[3:0] CE# 04 MODE 0 CE# SO SI SCK 01 2 3 4 5 6 7 04 High-Impedance MODE 0 MODE 3 MSB |
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