SAA7283ZP datasheet(18/36 Pages) PHILIPS

18 / 36 page

1996 Oct 24

Philips Semiconductors

Preliminary speciﬁcation

Terrestrial Digital Sound Decoder (TDSD3)

SAA7283

DIGITAL AUDIO INTERFACE IEC/EBU 958

Block structure

The output is grouped into a block of 192 consecutive

frames providing, for each channel the 192 channel status

data bits. The start of a block is designated by a special

sub-frame preamble.

Frame structure

Each frame is uniquely composed of two sub-frames.

The rate of transmission of frames corresponds exactly to

the source sampling frequency. In the 2-channel

operation, samples taken from both channels are

transmitted by time multiplexing in consecutive

sub-frames. Sub-frames related to Channel 1 (left or ‘A’

channel in stereophonic operation and primary channel in

monophonic operation) normally use preamble M.

However the preamble is changed to preamble B once

every 192 frames. This defines the block structure used to

organize the channel status information. Sub-frames of

Channel 2 (right or ‘B’ channel in stereophonic operation

and secondary channel in monophonic operation) always

use preamble W.

Sub-frame structure

Each frame is divided into 32 time-slots numbered 0 to 31.

Time-slots 0 to 3 carry one of three permitted preambles.

These are used to affect synchronization of sub-frames,

frames and blocks.

Time-slots 4 to 27 carry the audio sample word in linear

two's complement representation. The most significant bit

is carried by time-slot 27.

Time-slot 28 carries the validity flag associated with the

audio sample word. This flag is set to logic 0 if the audio

sample is reliable. If set to logic 1 then the sample is

unreliable.

Time-slot 29 carries one bit of the user data channel.

In this application this is not used and so is set to logic 0.

Time-slot 30 carries one bit of the channel status word

associated with the audio channel transmitted in the same

sub-frame.

Time-slot 31 carries a parity bit such that time-slots 4 to 31

inclusive will carry an even number of ones and an even

number of zeros.

Fig.5 Frame format.

handbook, full pagewidth

MLB155

channel 1

sub-frame

channel 2

channel 1

channel 2

channel 1

channel 2

sub-frame

frame 0

start of block

frame 1

frame 191

Fig.6 Sub-frame structure.

handbook, full pagewidth

MLB156

sync

preamble

logical 0 bits

audio sample word

VU CP

validity flag

user data = logic 0

channel status

parity bit

311 12

SAA7283ZP датащи(PDF) 18 Page - NXP Semiconductors

SAA7283ZP датащи(HTML) 18 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

датащи скачать

ссылки URL