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SAA7167 датащи(PDF) 9 Page - NXP Semiconductors |
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SAA7167 датащи(HTML) 9 Page - NXP Semiconductors |
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9 / 20 page ![]() 1995 Nov 03 9 Philips Semiconductors Preliminary specification YUV-to-RGB Digital-to-Analog Converter (DAC) SAA7167 Table 8 Bit functions in data byte; notes 1 and 2 Notes 1. All I2C-bus control bits are initialized to logic 0 after RES is activated. 2. PCLK should be active in any event to allow for correct operation of I2C-bus programming. DC CHARACTERISTICS Tamb = 0 to 70 °C. BIT DESCRIPTION FMTC1 and FMTC0 video format control: 00; YUV 4 :2:2 01; YUV 4 :1:1 10; YUV 2:1:1/CCIR 656 11; RGB 5 :6:5 KINV key polarity: KINV = 0: EXTKEY = HIGH for analog mixer to select DAC outputs KINV = 1: EXTKEY = HIGH for analog mixer to select analog RGB inputs KEN key enable: 0 = disable 1 = enable DRP UV input data code: 0 = two’s complement; 1 = binary offset KMOD2 to KMOD0 keying mode: 000; external key 100; 8-bit pixel colour key 101; 2 × 8-bit pixel colour key (with two-edge clock latching for pixel input) 110; 2 × 8-bit pixel colour key (with one-edge clock latching for pixel input) 111; 3 × 8-bit pixel colour key (with one-edge clock latching for pixel input) all other combinations are reserved KDLY2 to KDLY0 added keying delay cycles (from 0 to 7 PCLK) KD7 to KD0 the data value compared for 8, 16 or 24-bit pixel colour key SYMBOL PARAMETER MIN. TYP. MAX. UNIT VDDD digital supply voltage 4.75 5.0 5.25 V VDDA analog supply voltage 4.75 5.0 5.25 V IDDtot total supply current (fclk = 50 MHz) − 100 − mA VIH HIGH level input voltage (pin SDA) 3 − VDDD + 0.5 V VIL LOW level input voltage (pin SDA) −0.5 − +1.5 V VIH HIGH level digital input voltage 2 −− V VIL LOW level digital input voltage −− 0.8 V Vin full-scale analog RGB inputs − 0.7 − V Vout full scale analog RGB outputs (for 150 Ω load) − 1.4 − V DNL differential non-linearity error of video output −− 1 LSB INL integral non-linearity error of video output −− 1 LSB |
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