Data Sheet

LT8350S

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Rev. A

23 of 36

Internal Charge Path

Each of the two high-side gate drivers is biased from its floating bootstrap capacitor CBST1 and CBST2, which is usually

recharged by INTVCC through the integrated bootstrap diode D1 and D2 when the bottom power switches are turned

on. When the LT8350S operates exclusively in the buck or boost regions, one of the top power switches is constantly

on. Internal charge paths, from VOUT and BST2 to BST1, or from VIN and BST1 to BST2, charge the bootstrap capacitors

to above 3.3V so that the top power switch can be kept on.

Shutdown and Power-On-Reset

The LT8350S enters shutdown mode and drains less than 2µA (typical) quiescent current when the EN/UVLO pin is

below its shutdown threshold (0.3V minimum). Once the EN/UVLO pin is above its shutdown threshold (0.9V

maximum), the LT8350S wakes up startup circuitry, generates bandgap reference, and powers up the internal INTVCC

LDO. The INTVCC LDO supplies the internal control circuitry and gate drivers. Now, LT8350S enters undervoltage

lockout (UVLO) mode with a hysteresis current (2.5µA typical) pulled into the EN/UVLO pin. When the INTVCC pin is

charged above its rising UVLO threshold (2.52V typical), the EN/UVLO pin passes its rising enable threshold (1.235V

typical), and the junction temperature is less than its thermal shutdown (165°C typical), the LT8350S enters enable

mode, in which the EN/UVLO hysteresis current is turned off, and VREF is being charged up from ground. From the

time of entering enable mode to the time of VREF passing its rising UVLO threshold (1.89V typical), the LT8350S goes

through a power-on-reset (POR), waking up the entire internal control circuitry and settling to the right initial

conditions. After the POR, the LT8350S is ready and waiting for the signals on the CTRL and LOADEN pins to start

switching.

Start-Up and Fault Protection

Figure 35 shows the start-up and fault sequence for the LT8350S. During the POR state, the SS pin is hard pulled down

with a 130Ω to ground. In a pre-biased condition, the SS pin must be pulled below 0.2V to enter the INIT state, where

the LT8350S waits for 10µs to discharge the SS pin to the ground completely. After the 10µs, the LT8350S enters the

UP/PRE state when the LOADON signal goes high. The LOADON high signal happens when the CTRL pin is above its

CTRL OFF thresholds (0.225V typical) and the LOADEN is high.

During the UP/PRE state, the SS pin is charged up by a 12.5µA pull-up current while the switching is disabled and the

LOADTG is turned off. Once the SS pin is charged above 0.25V, the LT8350S enters the UP/TRY state, where the

LOADTG is turned on first while the switching is still disabled. If an excessive current flowing through the current

sense resistor triggers the ISP/ISN overcurrent (ISOC) signal, it will reset the LT8350S back into the POR state. After

10µs in the UP/TRY state without triggering the ISOC signal, the LT8350S enters the UP/RUN state.

During the UP/RUN state, the switching is enabled, and the start-up of the output voltage VOUT is controlled by the

voltage on the SS pin. When the SS pin voltage is less than 1V, the LT8350S regulates the FB pin voltage to the SS pin

voltage instead of the 1V reference. This allows the SS pin to program soft start by connecting an external capacitor

from the SS pin to the GND. The internal 12.5µA pull-up current charges up the capacitor, creating a voltage ramp on

the SS pin. As the SS pin voltage rises linearly from 0.25V to 1V (and beyond), the output voltage VOUT rises smoothly

to its final regulation voltage.

Once the SS pin is charged above 1.75V, the LT8350S enters the OK/RUN state, where the output short detection is

activated. The output short means that VFB < 0.25V. When the output short happens, the LT8350S enters the

FAULT/RUN state, where a 1.25µA pull-down current slowly discharges the SS pin with the other conditions the same

as the OK/RUN state. Once the SS pin is discharged below 1.7V, the LT8350S enters the DOWN/STOP state, and the

short detection is deactivated with the previous fault latched. Once the SS pin is discharged below 0.2V and the

LOADON signal is still high, the LT8350S goes back to the UP/RUN state.