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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SP6203EM5-2-7/TR датащи(PDF) 5 Page - Sipex Corporation |
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SP6203EM5-2-7/TR датащи(HTML) 5 Page - Sipex Corporation |
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5 / 16 page  5 Date: Apr2-07 SP6203/SP6205 Low Noise, 300 and 500mA CMOS LDO Regulators © 2007 Sipex Corporation 5 Date: 2//05 SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators © Copyright 2005 Sipex Corporation PIN DFN PIN CONFIGURATION PIN NUMBER NAME FUNCTION (fixed) VOUT Regulator Output Voltage. Connect to Pin VOUT. (Adj) ADJ Adjustable (Input): Adjustable regulator feed- back input. Connect to a resistive voltage- divider network. 2(fixed) BYP Reference bypass input for ultra-quiet operation. Connecting a 0nF cap on this pin reduces output noise. 2(Adj) NC No Connect 3 GND Ground EN Enable/Shutdown (Logic high = enable, logic low = shutdown) 5 VIN Power Supply Input 6 NC No Connect 7 NC No Connect VOUT Regulator Output VoltageA PiN DESCRiPTiON PiNOUT 8 PiN DFN 8 PiN OPTiON VOUT SP6203 SP6205 8 Pin DFN VIN NC VOUT BYP GND EN NC 2 3 7 6 5 FiXED SP6203 SP6205 8 Pin DFN VIN NC VOUT GND EN NC 2 3 7 6 5 ADJ NC ADJUSTABLE |
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