XRD8799 datasheet(7/23 Pages) EXAR

7 / 23 page

XRD8799

LOW POWER, 2 MSPS, 10-BIT, A/D CONVERTER WITH 8-CHANNEL MUX

REV. 1.00

NOTES:

1 Guaranteed. Not tested.

2 Tester measures code transition voltages by dithering the voltage of the analog input (VIN). The difference between

the measured code width and the ideal value (VREF/1024) is the DNL error. The INL error is the maximum distance

(in LSBs) from the best fit line to any transition voltage.

3 See VIN input equivalent circuit.

4 Clock specification to meet aperture specification (tAP). Actual rise/fall time can be less stringent with no loss of

accuracy.

5 Specified values guarantee functional device. Refer to other parameters for accuracy.

6 System can clock the XRD8799 with any duty cycle as long as all timing conditions are met.

7 Input range where input is converted correctly into binary code. Input voltage outside specified range converts to

zero or full scale output.

8 DVDD and AVDD are connected through the silicon substrate. Connect together at the package.

SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE

Clock to WR Hold Time

tCLKH2

Power Down Time1

tPD

300

Power Up Time1

tPU

200

Data Enable Delay

tDEN

Data High Z Delay

tDHZ

Pipeline Delay (Latency)

1.5

cycles

POWER SUPPLIES 8

Power Down (IDD)

IPD-DD

0.01

0.10

PD=High, CLK High or Low

Operating Voltage (AVDD, DVDD)

VDD

4.5

5.0

5.5

Current (AVDD + DVDD)

IDD

PD=Low (Normal Mode)

ELECTRICAL CHARACTERISTICS AVDD = DVDD = 5 V, FS = 2 MHZ (50% DUTY CYCLE), VREF(+) = 4.6, VREF(-) = AGND,

TA = 25°C, UNLESS OTHERWISE SPECIFIED

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

TEST CONDITIONS/COMMENTS

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