XRT79L71 datasheet(73/434 Pages) EXAR

73 / 434 page

XRT79L71

REV. 1.0.0

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION

DS3/E3 FRAMER AND PLCP PROCESSOR BLOCK REGISTERS

DS/E3 FRAMER BLOCK REGISTERS

The register map for the DS3/E3 Framer Block is presented in the Table below. Additionally, a detailed

description of each of the ?DS3/E3 Framer? block registers is presented below

Framer Operating Mode Register (Address = 0x1100)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

Framer Local

Loop Back

IsDS3

Interna lLOS

Enable

RESET

Direct Map

ATM

Frame For-

mat

TimRefSel[1:0]

R/W

BIT NUMBER

NAME

TYPE

DESCRIPTION

Framer Local Loop Back

R/W

Framer Block Local Loop-back Mode:

This READ/WRITE bit field configures the XRT79L71 to operate

in the Framer Local Loop-back Mode. If the XRT79L71 has

been configured to operate in the Framer Local Loop-back

Mode, then the signal that is generated by the Transmit DS3/E3

Framer block will be internally looped back into the receive input

of the Receive DS3/E3 Framer block.

NOTE: Whenever the XRT79L71 has been configured into the

Framer Local Loop-back Mode, then the Transmit DS3/

E3 LIU and Receive DS3/E3 LIU Blocks will NOT be

operating in the Signal Path.

0 - Configures the XRT79L71 to operate in the Normal Operating

(e.g., Non-Framer Local Loop-back) Mode

1 - Configures the XRT79L71 to operate in the Framer Local

Loop-back Mode

IsDS3

R/W

Is DS3 Mode:

This READ/WRITE bit-field, along with Bit 2 (Frame Format),

permits the user to configure both the Transmit and Receive

DS3/E3 Framer blocks to operate in the appropriate framing for-

mat. The relationship between the state of this bit-field, Bit 2 and

the resulting framing format is presented below.

NOTE: These bit settings also configure the Transmit DS3/E3

LIU and Receive DS3/E3 LIU Blocks into either the DS3

or E3 Modes.

Bit 2 (Frame

Format)

Bit 6 (IsDS3)

Framing Format

E3, ITU-T G.751

E3, ITU-T G.832

DS3, C-bit Parity

DS3, M13

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