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SA5212AFE датащи(PDF) 4 Page - NXP Semiconductors |
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SA5212AFE датащи(HTML) 4 Page - NXP Semiconductors |
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4 / 20 page ![]() Philips Semiconductors Product specification SA5212A Transimpedance amplifier (140MHz) 1998 Oct 07 4 AC ELECTRICAL CHARACTERISTICS Minimum and Maximum limits apply over operating temperature range at VCC=5V, unless otherwise specified. Typical data applies at VCC=5V and TA=25°C5. SYMBOL PARAMETER TEST CONDITIONS Min Typ Max UNIT RT Transresistance (differential output) DC tested, RL = ∞ Test Circuit 6, Procedure 1 9.0 14 19 k Ω RO Output resistance (differential output) DC tested 14 30 46 Ω RT Transresistance (single-ended output) DC tested, RL = ∞ 4.5 7 9.5 k Ω RO Output resistance (single-ended output) DC tested 7 15 23 Ω Test Circuit 1 D package, f3dB Bandwidth (-3dB) TA = 25°C 100 140 MHz N, FE packages, TA = 25°C 100 120 RIN Input resistance 70 110 150 Ω CIN Input capacitance 10 18 pF ∆R/∆V Transresistance power supply sensitivity VCC = 5 ±0.5V 9.6 %/V ∆R/∆T Transresistance ambient temperature sensitivity D package ∆TA = TA MAX-TA MIN 0.05 %/ °C IN RMS noise current spectral density (referred to input) Test Circuit 2 f = 10MHz TA = 25°C 2.5 pA/ √Hz Integrated RMS noise current over the band- TA = 25°C Test Circuit 2 ∆f = 50MHz 20 g width (referred to input) CS = 01 ∆f = 100MHz 27 IT ∆f = 200MHz 40 nA T ∆f = 50MHz 22 CS = 1pF ∆f = 100MHz 32 ∆f = 200MHz 52 PSRR Power supply rejection ratio2 Any package DC tested ∆VCC = 0.1V Equivalent AC Test Circuit 3 20 33 dB PSRR Power supply rejection ratio2 (ECL configuration) Any package f = 0.1MHz1 Test Circuit 4 23 dB VO MAX Maximum differential output voltage swing RL = ∞ Test Circuit 6, Procedure 3 1.7 3.2 VP-P VIN MAX Maximum input amplitude for output duty cycle of 50 ±5%3 Test Circuit 5 325 mVP-P tR Rise time for 50mV output signal4 Test Circuit 5 2.0 ns NOTES: 1. Package parasitic capacitance amounts to about 0.2pF. 2. PSRR is output referenced and is circuit board layout dependent at higher frequencies. For best performance use RF filter in VCC line. 3. Guaranteed by linearity and over load tests. 4. tR defined as 20-80% rise time. It is guaranteed by -3dB bandwidth test. 5. As in all high frequency circuits, a supply bypass capacitor should be located as close to the part as possible. |
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