OXCFU950 datasheet(39/74 Pages) OXFORD

39 / 74 page

DS-0023 February 2007

External—Free Release

Page 39 of 74

OXCFU950 DATA SHEET

OXFORD SEMICONDUCTOR, INC.

8 UART INTERFACE

The internal UART in the OXCFU950 is based on that used in the well-proven OX16C95x UARTs, but with a number of

significant enhancements. It is referred to throughout this document as the OXCFU950 UART core, or simply UART.

8.1

Mode Selection

The OXCFU950 UART is software-compatible with the 16C450, 16C550, 16C654 and 16C750 UARTs. The operation of the 950

depends on a number of modes which are referenced throughout this data sheet. The FIFO depth and compatibility modes are

tabulated below:

UART Mode

FIFO

size

FiCR[0]

Enhanced mode

(EFR[4]=1)

FiCR[5]

(guarded with LCR[7] = 1)

450

550

650

128

750

128

950*

128

Table 12: UART Mode Configuration

* Note that 950 mode configuration is identical to 650 configuration

8.1.1

450 Mode

After a hardware reset, bit 0 of the FiCR is cleared, making

the 950 compatible with the 16C450. The transmitter and

receiver FIFOs (referred to as the Transmit Holding

a depth of one. This is referred to as byte mode. When

FiCR[0] is cleared, all other mode selection parameters are

ignored.

8.1.2

550 Mode

After a hardware reset, writing a 1 to FiCR[0] increases the

FIFO size to 16, providing compatibility with 16C550

devices.

8.1.3

750 Mode

Writing a 1 to FiCR[0] increases the FIFO size to 16. In a

similar fashion to 16C750, the FIFO size can be further

increased to 128 by writing a 1 to FiCR[5]. Note that

access to FiCR[5] is protected by LCR[7]; i.e., to set

FiCR[5], software should first set LCR[7] to remove the

guard temporarily. When FiCR[5] is set, software should

clear LCR[7] for normal operation.

The 16C750 additional features over the 16C550 are

available as long as the UART is not put into Enhanced

mode (i.e. EFR[4] should be 0). These features are:

1. Deeper FIFOs

2. Automatic RTS/CTS out-of-band flow control

8.1.4

650 Mode

The 950 is compatible with the 16C654 when EFR[4] is set,

i.e., the device is in enhanced mode. Because 650

software drivers usually put the device into enhanced

mode, running 650 drivers on the 950 results in 650

compatibility with 128-deep FIFOs, as long as FiCR[0] is

set. Note that the 650 emulation mode of the 950 provides

128-byte deep FIFOs whereas the standard 16C654 has

only 32 byte FIFOs.

650 mode has the same enhancements as the 16C750

over the 16C550, but these are enabled using different

registers.

There are also additional enhancements over those of the

16C750 in this mode, these are:

1. Automatic in-band flow control

2. Special character detection

3. Infra-red IrDA format transmit and receive mode

4. Transmit trigger levels

5. Optional clock prescaler

OXCFU950 датащи(PDF) 39 Page - Oxford Semiconductor

OXCFU950 датащи(HTML) 39 Page - Oxford Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

датащи скачать

ссылки URL