13201 datasheet(15/28 Pages) FREESCALE

15 / 28 page

MC13201 Technical Data, Rev. 1.1,

Freescale Semiconductor

RXTXEN2

Digital Input

Active High. Low to high transition

initiates RX or TX sequence

depending on SPI setting. Should be

taken high after SPI programming to

start RX or TX sequence and should

be held high through the sequence.

After sequence is complete, return

RXTXEN to low. When held low,

forces Idle Mode.

See Footnote 2

ATTN2

Digital Input

Active Low Attention. Transitions IC

from either Hibernate or Doze Modes

to Idle.

See Footnote 2

CLKO

Digital Output

Clock output to host MCU.

Programmable frequencies of:

16 MHz, 8 MHz, 4 MHz, 2 MHz, 1

MHz, 62.5 kHz, 32.786+ kHz

(default),

and 16.393+ kHz.

SPICLK2

Digital Clock Input

External clock input for the SPI

interface.

See Footnote 2

MOSI2

Digital Input

Master Out/Slave In. Dedicated SPI

data input.

See Footnote 2

MISO3

Digital Output

Master In/Slave Out. Dedicated SPI

data output.

See Footnote 3

CE2

Digital Input

Active Low Chip Enable. Enables SPI

transfers.

See Footnote 2

IRQ

Digital Output

Active Low Interrupt Request.

Open drain device.

Programmable 40 kΩ internal pull-up.

Interrupt can be serviced every 6 µs with

<20 pF load.

Optional external pull-up must be >4 kΩ.

VDDD

Power Output

Digital regulated supply bypass.

Decouple to ground.

VDDINT

Power Input

Digital interface supply & digital

regulator input. Connect to Battery.

2.0 to 3.4 V. Decouple to ground.

GPIO51

Digital Input/Output

General Purpose Input/Output 5.

See Footnote 1

GPIO6

Digital Input/Output

General Purpose Input/Output 6.

GPIO7

Digital Input/Output

General Purpose Input/Output 7.

XTAL1

Input

Crystal Reference oscillator input.

Connect to 16 MHz crystal and load

capacitor.

Table 8. Pin Function Description (continued)

Pin #

Pin Name

Type

Description

Functionality

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