SN54AC533, SN74AC533

OCTAL TRANSPARENT DTYPE LATCHES

WITH 3STATE OUTPUTS

SCAS555C − NOVEMBER 1995 − REVISED OCTOBER 2003

5

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

0 V

0 V

th

tsu

VOLTAGE WAVEFORMS

Data Input

tPLH

tPHL

VOH

VOL

0 V

Input

In-Phase

Output

Timing Input

VOLTAGE WAVEFORMS

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT

S1

2

× VCC

500

Ω

500

Ω

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 2

× VCC

(see Note B)

Output

Waveform 2

S1 at Open

(see Note B)

VOL

VOH

tPZL

tPZH

tPLZ

tPHZ

≈VCC

0 V

VOL + 0.3 V

≈0 V

Open

VOLTAGE WAVEFORMS

tPLH/tPHL

tPLZ/tPZL

tPHZ/tPZH

Open

2

× VCC

Open

TEST

S1

VCC

0 V

tw

VOLTAGE WAVEFORMS

Input

VOH − 0.3 V

50% VCC

50% VCC

50% VCC

VCC

VCC

50% VCC

50% VCC

50% VCC

50% VCC

VCC

50% VCC

50% VCC

50% VCC

50% VCC

VCC

50% VCC

50% VCC

50% VCC

tPHL

VOL

50% VCC

VOH

tPLH

Out-of-Phase

Output

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR

≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.

D. The outputs are measured one at a time with one input transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms