Philips Semiconductors Programmable Logic Devices

Product specification

PLS100/PLS101

Programmable logic arrays

(16

× 48 × 8)

49

October 22, 1993

853–0308 11164

DESCRIPTION

The PLS100 (3-State) and PLS101 (Open

Collector) are bipolar, fuse Programmable

Logic Arrays (PLAs). Each device utilizes the

standard AND/OR/Invert architecture to

directly implement custom sum of product

equations.

Each device consists of 16 dedicated inputs

and 8 dedicated outputs. Each output is

capable of being actively controlled by any or

all of the 48 product terms. The True,

Complement, or Don’t Care condition of each

of the 16 inputs and be ANDed together to

comprise one P-term. All 48 P-terms can be

selectively ORed to each output.

The PLS100 and PLS101 are fully TTL

compatible, and chip enable control for

expansion of input variables and output

inhibit. They feature either Open Collector or

3-State outputs for ease of expansion of

product terms and application in

bus-organized systems.

Order codes are listed in the Ordering

Information Table.

FEATURES

– PLS100: 3-State

– PLS101: Open-Collector

– 3-State: Hi-Z

– Open-Collector: High

APPLICATIONS

PIN CONFIGURATIONS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

N Package

FE

*

I7

I6

I5

I4

I3

I2

I1

I0

F7

F6

F5

F4

GND

VCC

I8

I9

I10

I11

I12

I14

CE

F0

F1

F2

F3

I15

I13

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

FE

A Package

F7

I7

I6

I5

I4

I3

I2

I1

I0

F6

F5 F4 GND

F2

F1

F0

I9

I8

VCC

F3

CE

I10

I11

I12

I14

I15

I13

be left open or connected to ground during normal

operation.

N = Plastic DIP (600mil-wide)

A = Plastic Leaded Chip Carrier

ORDERING INFORMATION

DESCRIPTION

3-STATE

OPEN COLLECTOR

DRAWING NUMBER

28-Pin Plastic Dual In-Line 600mil-wide

PLS100N

PLS101N

0413D

28-Pin Plastic Leaded Chip Carrier

PLS100A

PLS101A

0401F