DATASHEET

OV9620/OV9120 Datasheet

Doc #DS102

© OmniVision Technologies Inc., 2002, version 2.0

Page 3

Pin Descriptions

Table 1. Pin Description

Pin No.

Name

Pin Type

Function/Description

01

SVDD

P

3.3 volt supply for the pixel array

02

VrHigh

A

Sensor high reference. Bypass to ground with a 0.1µF capacitor

03

NBIT

A

Sensor bit line reference. Bypass to ground with a 0.1µF capacitor

04

DEVDD

P

3.3 volt supply for sensor array decoder

05

DEGND

P

Ground for sensor array decoder

06

VrLow

A

Sensor low reference. Bypass to ground with a 0.1

µF capacitor.

07

PWDN

I (0)

Power down mode enable, active high.

08

FREX

I (0)

Snapshot trigger, use to activate a snapshot sequence.

09

SRAMT

I (0)

SRAM interface trigger, use to activate SRAM interface.

10

RESET

I (0)

Chip reset, active high.

11

SCCB_E

I (0)

SCCB interface enable signal, active low.

12

EXPSTB

I (0)

Snapshot exposure start trigger, “1” – sensor stays in reset mode, “0” – sensor

starts exposure. Only effect in snap-shot mode.

13

VGA

I (0)

Sensor resolution selection.”1” – VGA. “0” – SXGA resolution.

14

FSIN

I (0)

Frame synchronization input.

15

VcCHG

A

Sensor reference. Bypass to ground with a 0.1µF capacitor.

16

AVDD

P

3.3-volt supply for analog circuits.

17

AGND

P

Ground for analog circuits.

18

ASUB

P

Ground for analog circuit’s substrate.

19

VrAD2

A

A/D converter reference. Bypass to ground with a 0.1µF capacitor.

20

ADVDD

P

3.3-volt supply for A/D converter.

21

ADGND

P

Ground for A/D converter.

22

DVDD

P

2.5-volt supply for digital circuits.

23

DGND

P

Ground for digital circuits.

24

D0

O

Bit 0 of video port output.

25

D1

O

Bit 1 of video port output.

26

D2

O

Bit 2 of video port output.

27

D3

O

Bit 3 of video port output.

28

D4

O

Bit 4 of video port output.

29

XCLK1

I

Crystal clock input.

30

XCLK2

O

Crystal clock output.

31

PCLK

O

Pixel clock output.

32

D5

O

Bit 5 of video port output.

33

D6

O

Bit 6 of video port output.

34

D7

O

Bit 7 of video port output.

35

D8

O

Bit 8 of video port output.

36

D9

O

Bit 9 of video port output.

37

DOVDD

P

3.3-volt supply for digital video port.

38

DOGND

P

Ground for digital video port.

39

HREF

I/O

Horizontal reference output.

40

CHSYNC

I/O

Horizontal synchronization output when chip in master mode. Horizontal

synchronization input when chip in slave mode.

41

VSYNC

I/O

Vertical synchronization output when chip in master mode. Vertical synchronization

input when chip in slave mode.

42

NC

-

Not connected

43

NC

-

Not connected

44

NC

-

Not connected

45

SIO_D

I/O

SCCB slave interface data input and output.

46

SIO_C

I

SCCB slave interface clock input

47

VcCHG

A

Sensor reference. Bypass to ground through 0.1

µF capacitor

48

SGND

P

Ground for pixel array.

Legend: (I=Input), (O=Output), (I/O=Bi-directional), (P=Power), (A=Analog)