M68HC05 datasheet(79/118 Pages) FREESCALE

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MC68HC05C9A Advance Information Data Sheet, Rev. 4.1

Freescale Semiconductor

Chapter 11

Instruction Set

11.1 Introduction

The microcontroller unit (MCU) instruction set has 62 instructions and uses eight addressing modes. The

instructions include all those of the M146805 CMOS (complementary metal oxide silicon) Family plus one

more: the unsigned multiply (MUL) instruction. The MUL instruction allows unsigned multiplication of the

contents of the accumulator (A) and the index register (X). The high-order product is stored in the index

11.2 Addressing Modes

The central processor unit (CPU) uses eight addressing modes for flexibility in accessing data. The

addressing modes provide eight different ways for the CPU to find the data required to execute an

instruction. The eight addressing modes are:

•

Inherent

•Immediate

•Direct

•

Extended

•

Indexed, no offset

•

Indexed, 8-bit offset

•

Indexed, 16-bit offset

•

Relative

11.2.1 Inherent

Inherent instructions are those that have no operand, such as return from interrupt (RTI) and stop (STOP).

Some of the inherent instructions act on data in the CPU registers, such as set carry flag (SEC) and

increment accumulator (INCA). Inherent instructions require no operand address and are one byte long.

11.2.2 Immediate

Immediate instructions are those that contain a value to be used in an operation with the value in the

accumulator or index register. Immediate instructions require no operand address and are two bytes long.

The opcode is the first byte, and the immediate data value is the second byte.

11.2.3 Direct

Direct instructions can access any of the first 256 memory locations with two bytes. The first byte is the

opcode, and the second is the low byte of the operand address. In direct addressing, the CPU

automatically uses $00 as the high byte of the operand address.

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