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PAC7101 датащи(PDF) 30 Page - Freescale Semiconductor, Inc |
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PAC7101 датащи(HTML) 30 Page - Freescale Semiconductor, Inc |
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30 / 56 page ![]() MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2 Preliminary Electrical Characteristics Freescale Semiconductor 30 Figure 11. SPI Master Timing (CPHA = 0) Figure 12. SPI Master Timing (CPHA = 1) MSB Out(2) MSB In(2) PCSx SCK (CPOL = 0) (OUTPUT) SCK (CPOL = 1) (OUTPUT) (OUTPUT) Bit 6 ... 1 SIN (INPUT) SOUT (OUTPUT) LSB Out LSB In Bit 6 ... 1 U2 U1b U3 U4 U4 U12 U5 U6 U11 U9 U9 U10 1. If configured as output. 2. LSBFE = 0. For LSBFE = 1, bit order is LSB, bit 1, ..., bit 6, MSB. PCSx SCK (CPOL = 0) (OUTPUT) SCK (CPOL = 1) (OUTPUT) (OUTPUT) Bit 6 ... 1 SIN (INPUT) SOUT (OUTPUT) LSB In Bit 6 ... 1 Port Data Port Data Master LSB Out U10 U9 U6 U11 U12 U11 U5 U4 U4 U2 U1b U3 U12 MSB Out(2) MSB In(2) 1. If configured as output. 2. LSBFE = 0. For LSBFE = 1, bit order is LSB, bit 1, ..., bit 6, MSB. |
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