IA82527-PTQ44A-R datasheet(17/45 Pages) INNOVASIC

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IA82527

04 May 2007

CAN Serial Communications Controller

As of Production Ver. 00

PRELIMINARY



 2007

EN21070504-00

www.Innovasic.com

Customer Support:

Page 17 of 45

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Table 3. IA82527 Pin/Signal Descriptions, continued

Signal

Name

PLCC

QFP

Description

wr_n

wr_n/wrl_n/r-w_n

write. Input. Active Low. Mode 0.

When wr_n is asserted (low), it signals a write cycle.

wrh_n

wrh_n/p2.7

write high byte. Input. Active Low. Mode 1.

When wrh_n is asserted (low), it signals a write cycle for the high

byte of data (bits 15–8).

wrl_n

wr_n/wrl_n/r-w_n

write low byte. Input. Active Low. Mode 1.

When wrl_n is asserted (low), it signals a write cycle for the low byte

of data (bits 7–0).

xtal1

—

Crystal (xtal) 1. Input.

The xtal1 pin is the input connection for an external crystal that

drives the IA82527 internal oscillator. (When an external crystal is

used, it is connected between this pin and the xtal2 pin—see next

table entry.)

NOTE: If an external oscillator or clock source is used to drive the

IA82527 instead of a crystal, the xtal1 pin is the input for this clock

source.

xtal2

—

Crystal (xtal) 2. Output (push-pull).

The xtal2 pin is the output connection for an external crystal that

drives the IA82527 internal oscillator. (When an external crystal is

used, it is connected between this pin and the xtal1 pin—see

previous table entry.)

NOTE: If an external oscillator or clock source is used to drive the

IA82527 instead of a crystal, xtal2 must be left unconnected (i.e.,

must be floated). Additionally, the xtal2 output must not be used as a

clock source for other system components.

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