AD9868 datasheet(21/36 Pages) AD

21 / 36 page

AD9868

Rev. 0 | Page 21 of 36

TRANSMIT PATH

The transmit path of the AD9868 (or its related part, the AD9869)

of a selectable digital 2×/4× interpolation filter, a 10-bit (or12-bit)

TxDAC, and a current-output amplifier, IAMP (see Figure 18).

Note that the additional two bits of resolution offered by the

AD9869 result in a 10 dB to 12 dB reduction in the pass-band

noise floor. The digital interpolation filter relaxes the Tx analog

filtering requirements by simultaneously reducing the images

from the DAC reconstruction process while increasing the analog

filter’s transition band. The digital interpolation filter can also

be bypassed, resulting in lower digital current consumption.

AD9868

0 TO –7.5dB

0 TO –12dB

2-4×

IOUTN+

IOUTN–

IAMP

TXCLK

TXEN/SYNC

ADIO[9:4]/

Tx[5:0]

ADIO[3:0]/

Rx[5:2]

TxDAC

Figure 18. Functional Block Diagram of Tx Path

DIGITAL INTERPOLATION FILTERS

The input data from the Tx port can be fed into a selectable

2×/4× interpolation filter. The interpolation factor for the

digital filter is set via SPI Register 0x0C with the settings shown

in Table 17. The maximum input word rate, fDATA, into the

interpolation filter is 80 MSPS; the maximum DAC update rate

is 200 MSPS. Therefore, applications with input word rates at or

below 50 MSPS can benefit from 4× interpolation, whereas

applications with input word rates between 50 MSPS and

80 MSPS can benefit from 2× interpolation.

Table 17. Interpolation Factor Set via SPI Register 0x0C

Bits 7:6]

Interpolation Factor

Do not use

The interpolation filter consists of two cascaded half-band filter

stages with each stage providing 2× interpolation. The first

stage filter consists of 43 taps. The second stage filter, operating

at the higher data rate, consists of 11 taps. The normalized

wideband and pass-band filter responses (relative fDATA) for the

2× low-pass interpolation filter and 4× low-pass interpolation

filter are shown in Figure 19 and Figure 20, respectively.

These responses also include the inherent sinc(x) from the

TxDAC reconstruction process and can be used to estimate any

post analog filtering requirements.

The pipeline delays of the 2× and 4× filter responses are

21.5 clock cycles and 24 clock cycles, respectively, relative to

fDATA. The filter delay is also taken into consideration for

applications configured for a half-duplex interface with the half-

duplex power-down mode enabled. This feature allows the user

to set a programmable delay that powers down the TxDAC and

IAMP only after the last Tx input sample has propagated

through the digital filter. See the Power Control and Dissipation

section for more details.

NORMALIZED FREQUENCY (Relative to

fDATA)

1.25

2.00

–90

–80

–70

–60

–50

–40

–30

–20

–10

1.75

0.75

1.00

1.50

WIDE BAND

0.50

0.25

2.5

–2.5

–2.0

–1.5

–1.0

–0.5

0.5

1.0

1.5

2.0

PASS BAND

–1.0dB @ 0.441

fDATA

Figure 19. Frequency Response of 2× Interpolation Filter

(Normalized to fDATA)

NORMALIZED FREQUENCY (Relative to

fDATA)

2.5

4.0

–90

–80

–70

–60

–50

–40

–30

–20

–10

3.5

1.5

2.0

3.0

WIDE BAND

1.0

0.5

2.5

–2.5

–2.0

–1.5

–1.0

–0.5

0.5

1.0

1.5

2.0

PASS BAND

–1.0dB @ 0.45

fDATA

Figure 20. Frequency Response of 4× Interpolation Filter

(Normalized to fDATA)

AD9868 датащи(PDF) 21 Page - Analog Devices

AD9868 датащи(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

датащи скачать

ссылки URL