AD1928 datasheet(21/32 Pages) AD

номер детали	AD1928

подробное описание детали	2 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec

PDF	32 Pages

Scroll/Zoom	100%

производитель	AD [Analog Devices]

домашняя страница	http://www.analog.com

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21 / 32 page

AD1928

Rev. 0 | Page 21 of 32

ALRCLK

ABCLK

2 ADC CHANNELS OF

SECOND IC IN THE CHAIN

2 ADC CHANNELS OF

FIRST IC IN THE CHAIN

UNUSED UNUSED ADC L1 ADC R1 UNUSED UNUSED ADC L1 ADC R1

ADCTDMOUT (TDM_OUT

OF THE SECOND AD1928

IN THE CHAIN)

UNUSED UNUSED ADC L1 ADC R1

ASDATA1 (TDM_IN

OF THE SECOND AD1928

IN THE CHAIN)

32 BITS

MSB

DSP

SECOND

AD1928

FIRST

AD1928

Figure 22. ADC TDM Daisy-Chain Mode (512 fS BCLK, Two-AD1928 Daisy Chain)

LRCLK

BCLK

SDATA

LRCLK

BCLK

SDATA

LRCLK

BCLK

SDATA

LSB

LEFT CHANNEL

RIGHT CHANNEL

LEFT CHANNEL

RIGHT CHANNEL

MSB

RIGHT-JUSTIFIED MODE—SELECT NUMBER OF BITS PER CHANNEL

DSP MODE—16 BITS TO 24 BITS PER CHANNEL

I2S-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL

LEFT-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL

LRCLK

BCLK

SDATA

LSB

NOTES

1. DSP MODE DOES NOT IDENTIFY CHANNEL.

2. LRCLK NORMALLY OPERATES AT

fS EXCEPT FOR DSP MODE WHICH, IS 2 × fS.

3. BCLK FREQUENCY IS NORMALLY 64 × LRCLK BUT MAY BE OPERATED IN BURST MODE.

MSB

Figure 23. Stereo Serial Modes

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