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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TSL2520 датащи(PDF) 39 Page - OSRAM GmbH |
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TSL2520 датащи(HTML) 39 Page - OSRAM GmbH |
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39 / 69 page  Page 38 Datasheet, Public Document Feedback [v3-00] 2022-Dec-20 TSL2520 − Register O ver view SIEN Register Figure 50: SIEN Note(s): 1. Return to the Register Map (0xBB). MOD_COMP_CFG1 Register Figure 51: MOD_COMP_CFG1 Note(s): 1. Return to the Register Map (0xCE). Addr: 0xBB SIEN Bit Field Reset Type Bit Description 7:2 Reserved 0 1 SIEN_MEASUREMENT_ SEQUENCER 0R/W Measurement Sequencer Interrupt Enable. Setting this bit will allow a system interrupt SINT as soon as invoked by a measurement sequencer event. Please see SINT_MEASUREMENT_SEQUENCER for further information. 0SIEN_VSYNC 0 R/W Vsync Interrupt Enable. Setting this bit will allow a system interrupt SINT as soon as soon as a vysnc interrupt occurs. Please see SINT_VSYNC for further information. Addr: 0xCE MOD_COMP_CFG1 Bit Field Reset Type Bit Description 7:6 MOD_IDAC_RANGE 10b R/W Sets the auto zero range of the current digital-to-analog converter. 00: 58μV 01: 38μV 10: 18μV 11: 9μV 5:0 Reserved 0 |
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