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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMG39923 датащи(PDF) 81 Page - OSRAM GmbH |
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TMG39923 датащи(HTML) 81 Page - OSRAM GmbH |
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81 / 96 page  Page 80 ams Datasheet Document Feedback [v1-06] 2018-Feb-27 TMG3992 − Register Description Configuration Register AF (CONFIG_AF), Gesture Mode This register indicates the operational condition of the gesture state machine. Figure 85: Configuration Register AF Note(s): 1. If GINT (irrespective of GVALID) remains set after the FIFO has been read GFLVL times, this indicates that new data has been added to FIFO during the last FIFO read. Clear Interrupt Registers (0xE3, 0xE7) Interrupts are cleared by read or write access to the appropriate register. IFORCE is used to manually assert the INT pin. Figure 86: Clear Interrupt Registers 765 432 1 0 Reserved GFOV GVALID Field Bits Description Reserved 7:2 Reserved. GFOV 1 Gesture FIFO Overflow. A setting of 1 indicates that the FIFO has filled to capacity and that new gesture detector data has been lost. GVALID 0 Gesture Valid. GVALID bit is set when GFLVL becomes greater than GFIFOTH (i.e. FIFO has enough data to set GINT). GVALID is reset when GMODE = 0 and the GFLVL=0 (i.e. All FIFO data has been read). Registers Address Bits Description PBCLEAR 0xE3 7:0 Pattern Burst interrupt clear IFORCE 0xE4 7:0 Forces an interrupt PICLEAR 0xE5 7:0 Proximity interrupt clear CICLEAR 0xE6 7:0 ALS interrupt clear AICLEAR 0xE7 7:0 Clears all non-gesture interrupts |
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