5

AT24C02A/04A

5083C–SEEPR–1/07

Device Operation

CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-

nal device. Data on the SDA pin may change only during SCL low time periods (see

Figure 2). Data changes during SCL high periods will indicate a start or stop condition as

defined in Figure 2.

Figure 2. Data Validity

START CONDITION: A high-to-low transition of SDA with SCL high is a start condition

that must precede any other command (see Figure 3).

Figure 3. Start and Stop Definition

STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition.

After a read sequence, the stop command will place the EEPROM in a standby power

mode (see Figure 3).

ACKNOWLEDGE: All addresses and data words are serially transmitted to and from

the EEPROM in 8-bit words. The EEPROM sends a “0” to acknowledge that it has

received each word. This happens during the ninth clock cycle.

STANDBY MODE: The AT24C02A/04A features a low-power standby mode that is

enabled (a) upon power-up and (b) after the receipt of the STOP bit and the completion

of any internal operations.