PCD5043 datasheet(4/24 Pages) PHILIPS

номер детали	PCD5043

подробное описание детали	DECT burst mode controller

PDF	24 Pages

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производитель	PHILIPS [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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4 / 24 page

1996 Oct 31

Philips Semiconductors

Objective speciﬁcation

DECT burst mode controller

PCD5043

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MBH742

RF INTERFACE

PROGRAMMABLE

COMMUNICATION

CONTROLLER (PCC)

DATA MEMORY

2 kbyte RAM

TIMING, CONTROL,

CLOCK

GENERATION

PCC

PROGRAM MEMORY

4 kbyte ROM

MICROCONTROLLER

INTERFACE

SPEECH

INTERFACE

internal

bus

PCD5043

DECT

BURST MODE

CONTROLLER

to CODEC/

Highway

3-wire synthesizer

interface

Rx/Tx data

8051/68000

interface

PINNING (see Fig.2)

SYMBOL

TYPE(1)

DESCRIPTION

AD0 to AD7

1 to 8

I/O

address/Data bus

ALE

address latch enable

chip select (active LOW)

A8 to A10

13 to 11

address bus

VDD1

positive supply 1

PROC_CLK

microcontroller clock; programmable from fCLK/64 to fCLK, where fCLK

is the crystal oscillator frequency

VSS1

negative supply 1

XTAL1

crystal oscillator input

XTAL2

crystal oscillator output

VSS2

negative supply

RESET_OUT

watchdog timer output; intended to reset the external microcontroller

when expired

read (active LOW)

write (active LOW)

RDY

ready signal (active LOW), to initiate wait states in the

microcontroller (open drain)

INT

interrupt (active LOW)

CLK100

100 Hz frame timer

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