W39V080FA

Publication Release Date: Dec. 13, 2005

- 25 -

Revision A5

10. FWH INTERFACE MODE AC CHARACTERISTICS

10.1 AC Test Conditions

PARAMETER

CONDITIONS

Input Pulse Levels

Input Rise/Fall Slew Rate

1 V/nS

Input/Output Timing Level

Output Load

10.2 Read/Write Cycle Timing Parameters

W39V080FA

PARAMETER

SYMBOL

MIN.

MAX.

UNIT

Clock Cycle Time

30

-

nS

Input Set Up Time

7

-

nS

Input Hold Time

0

-

nS

Clock to Data Valid

2

11

nS

Note: Minimum and Maximum time have different load. Please refer to PCI specification.

10.3 Reset Timing Parameters

PARAMETER

SYMBOL

MIN.

TYP.

MAX.

UNIT

VDD stable to Reset Active

1

-

-

mS

Clock Stable to Reset Active

100

-

-

μS

Reset Pulse Width

100

-

-

nS

Reset Active to Output Float

-

-

50

nS

Reset Inactive to Input Active

10

-

-

μS

Note: All AC timing signals observe the following guidelines for determining setup and hold times:

(a) High level signal's reference level is input high and

(b) low level signal's reference level is input low.

Please refer to the AC testing condition.