PCD3310P datasheet(7/28 Pages) PHILIPS

7 / 28 page

1996 Nov 21

Philips Semiconductors

Product speciﬁcation

Pulse and DTMF diallers with redial

PCD3310; PCD3310A

Fig.2 Pin configuration (DIP20 package).

handbook, halfpage

OSCI

PD/DTMF

TONE

VSS

FLD

ROW 5

ROW 4

ROW 3

ROW 2

ROW 1

OSCO

VDD

CF/DMODE/FS

COL 4

DP/FLO

COL 3

COL 2

COL 1

PCD3310P

PCD3310AP

MGE489

Fig.3 Pin configuration (SO28 package).

handbook, halfpage

OSCI

PD/DTMF

TONE

n.c.

VSS

n.c.

FLD

ROW 5

ROW 4

n.c.

ROW 3

ROW 2

ROW 1

OSCO

VDD

n.c.

DP/FLO

CF/DMODE/FS

COL 4

n.c.

COL 3

COL 2

COL 1

PCD3310T

PCD3310AT

MGE488

FUNCTIONAL DESCRIPTION

References to ‘the device’ apply to both the PCD3310 and

the PCD3310A.

7.1

Power supply (VDD and VSS)

The positive supply of the device (VDD) must meet the

voltage requirements as indicated in Chapter 11.

To avoid undefined states of the device at power-on, an

internal reset circuit clears the control logic and counters.

If VDD drops below the minimum standby supply voltage of

1.8 V the power-on reset circuit inhibits redialling after

hook-off. The power-on reset signal has the highest

priority; it blocks and resets the device without delay

regardless of the state of chip enable input (CE).

7.2

Clock oscillator (OSCI and OSCO)

The timebase for the device for both pulse and DTMF

dialling is a crystal controlled on-chip oscillator which is

completed by connecting a 3.58 MHz crystal or ceramic

resonator between the OSCI and OSCO pins.

Recommended resonator type:

• 3.58 MHz PXE - Murata; CSA 3.58MG310VA.

7.3

Chip enable (CE)

The CE input enables the device and is used to initialize

the device. When CE is LOW it provides the static standby

condition. In this state the clock oscillator is disabled, all

registers and logic are reset with the exception of the redial

registers, Read Address Counter (RAC), Write Address

Counter (WAC) and Temporary Write Address Counter

(TWAC). The RAC points to the first digit of the last

number dialled, the WAC and TWAC point to the last

entered digits in the main and temporary registers

(see Fig.6). The keyboard input is inhibited, but data

previously entered is saved in the redial registers provided

VDD is higher than Vstb. The current drawn is Istb (standby

current) and serves to retain data in the redial registers

during hook-on.

When CE is HIGH it activates the clock oscillator and the

device changes from static standby condition to the

conversation mode. The current consumption is IDD(conv)

until the first digit is entered from the keyboard. Then a

dialling or redialling operation starts. The operating current

is IDD(pulse) if in the pulse dialling mode, or IDD(DTMF) if the

DTMF dialling mode is selected.

PCD3310P датащи(PDF) 7 Page - NXP Semiconductors

PCD3310P датащи(HTML) 7 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

датащи скачать

ссылки URL