Pin Descriptions and Equivalent Circuits

Pin No.

Symbol

Equivalent Circuit

Description

ANALOG I/O

5V

Differential analog input pins. The differential full-scale input

signal level is 2V

common mode voltage, V

6V

2V

RP

These pins should each be bypassed to AGND with a low ESL

(equivalent series inductance) 1 µF capacitor placed very close

to the pin to minimize stray inductance. A 0.1 µF capacitor

should be placed between V

possible, anda1µF capacitor should be placed in parallel.

V

1mA for use as a temperature stable 1.5V reference.

It is recommended to use V

voltage, V

32

V

CMO

1V

RN

31

V

REF

Reference Voltage. This device provides an internally

developed 1.2V reference. When using the internal reference,

V

low equivalent series inductance (ESL) capacitor .

This pin may be driven with an external 1.2V reference voltage.

This pin should not be used to source or sink current.

DIGITAL I/O

11

CLK

The clock input pin.

The analog input is sampled on the rising edge of the clock

input.

12

OF/DCS

This is a four-state pin controlling the input clock mode and

output data format.

OF/DCS = V

duty cycle stabilization applied to the input clock

OF/DCS = AGND, output data format is offset binary, without

duty cycle stabilization applied to the input clock.

OF/DCS = (2/3)*V

cycle stabilization applied to the input clock

OF/DCS = (1/3)*V

stabilization applied to the input clock.

30

PD

This is a two-state input controlling Power Down.

PD=V

reduced.

PD = AGND, Normal operation.

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