ISL6549CBZ datasheet(9/18 Pages) INTERSIL

9 / 18 page

FN9168.2

September 22, 2006

soft-start cycles (1 internal soft-start ramp cycle, plus

one-quarter on the next).

If either VINx voltage is not present at startup, that will cause a

UV shutdown and restart cycle; similarly, if either VINx is

removed after start-up, a shutdown and restart cycle will start

when its output drifts down to the UV trip point. But in both

cases, once the VINx is restored, the VOUTs will recover on

the next soft-start ramp.

Figure 5 shows an example of the start-up, with VIN1 not

powered. VOUT2 ramps up one-quarter of the way, at which

time the UV comparators are enabled. Since VIN1 is not

present, VOUT1 will not be following the soft-start ramp up,

and it will fail the test for UV, shutting down both outputs. It

starts an internal delay time-out (equal to one soft-start

interval), and then starts a new ramp. For this example, it

shows about a 1.6ms ramp up, and 6.4ms off, before the next

ramp starts. Thus, the total period of 8ms is based on 1.25

soft-start cycles (one-quarter of the first ramp, and then one

full time-out, at a clock period of around 1.6µs) The dotted

magenta line shows the case where VOUT2 is allowed to

ramp all of the way up to 2V.

Switching Frequency

The switching frequency of the ISL6549 is determined by the

value of the FS resistor. The graph in Figure 6 shows the

dependence between the resistor chosen and the resulting

switching frequency.

Output Voltage Selection

The output voltage of the PWM converter can be programmed

to any level between VIN1 and the internal reference, 0.8V.

However, even though the ISL6549 can run at near 100%

duty cycle at zero load, additional voltage margin is required

above VIN1 to allow for loading. An external resistor divider is

used to scale the output voltage relative to the reference

voltage and feed it back to the inverting input of the error

amplifier (see Figure 7). A typical value for R1 may be 1.00k

Ω

(±1% for accuracy), and then R4 (also ±1%) is chosen

according to Equation 1:

R1 is also part of the compensation circuit (see “PWM

Controller Feedback Compensation” on page 10 for more

details), so once chosen for that, it should not be changed to

adjust VOUT1; only change R4. If the output voltage desired

is 0.8V, simply route VOUT1 back to the FB pin through R1,

but do not populate R4. VOUT1 voltages less than the 0.8V

reference are not available.

The linear regulator output voltage is also set by means of

an external resistor divider as shown in Figure 8. Select a

value for R5 (typical 1.00k

Ω ±1% for accuracy), and use

Equation 2 to calculate R6 (also ±1%), where VOUT2 is the

desired linear regulator output voltage and VREF is the

internal reference voltage, 0.8V. For an output voltage of

0.8V, simply populate R5 with a value less than 5k

Ω and do

not populate R6. VOUT2 voltages less than the 0.8V

reference are not available.

FIGURE 5. UNDERVOLTAGE PROTECTION (SIMULATED BY

HAVING NO VIN1 ON POWER-UP)

GND>

VOUT2 (0.5V/DIV)

GND>

1.6ms

6.4ms

VOUT1 (0.5V/DIV)

100k

10k

100k

R (k

Ω)

FIGURE 6. FREQUENCY vs FS RESISTOR

0.8V

OUT1

0.8V

–

----------------------------------------

(EQ. 1)

FIGURE 7. OUTPUT VOLTAGE SELECTION OF THE

SWITCHER (VOUT1)

COUT1

VOUT1

LOUT

ISL6549

UGATE

COMP

LGATE

VIN1

CIN1

OUT

0.8

--------

⎝⎠

⎛⎞

PHASE

0.8V

OUT2

0.8V

–

---------------------------------------

(EQ. 2)

ISL6549

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