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P80CL31 датащи(PDF) 21 Page - NXP Semiconductors |
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P80CL31 датащи(HTML) 21 Page - NXP Semiconductors |
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21 / 68 page ![]() 1997 Apr 15 21 Philips Semiconductors Product specification Low voltage 8-bit microcontrollers with UART P80CL31; P80CL51 Table 5 Serial Port Control Register (address 98H) Table 6 Description of S0CON bits Table 7 Selection of the serial port modes 76543210 SM0 SM1 SM2 REN TB8 RB8 TI RI BIT SYMBOL DESCRIPTION 7 SM0 These bits are used to select the serial port mode; see Table 7. 6 SM1 5 SM2 Enables the multiprocessor communication feature in Modes 2 and 3. In these modes, if SM2 = 1, then RI will not be activated if the received 9th data bit (RB8) is a logic 0. In Mode 1, if SM2 = 1, then RI will not be activated unless a valid stop bit was received. In Mode 0, SM2 should be a logic 0. 4 REN Enables serial reception and is set by software to enable reception, and cleared by software to disable reception. 3 TB8 Is the 9th data bit that will be transmitted in Modes 2 and 3; set or cleared by software as desired. 2 RB8 In Modes 2 and 3, is the 9th data bit received. In Mode 1, if SM2 = 0 then RB8 is the stop bit that was received; in Mode 0, RB8 is not used. 1TI The transmit interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or at the beginning of the stop bit time in the other modes, in any serial transmission. Must be cleared by software. 0RI The receive interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or halfway through the stop bit time in the other modes, in any serial transmission (except see SM2). Must be cleared by software. SM0 SM1 MODE DESCRIPTION BAUD RATE 0 0 Mode 0 Shift register 1 ⁄12 × fosc 0 1 Mode 1 8-bit UART variable 1 0 Mode 2 9-bit UART 1 ⁄32 or 1⁄64 × fosc 1 1 Mode 3 9-bit UART variable |
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