ADP7112 datasheet(10/47 Pages) AD

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Data Sheet

LT3046

analog.com

Rev 0

10 of 47

Table 4. Pin Descriptions

NAME

DESCRIPTION

1, 2

Input. The IN pins supply power to the regulator. The LT3046 requires a bypass

capacitor at the IN pin. In general, the output impedance of a battery rises with

frequency; therefore, it is best practice to include a bypass capacitor in battery-

powered applications. While a 4.7μF input bypass capacitor generally suffices,

applications with large load transients can require higher input capacitance to prevent

input supply droop. See the Stability and Input Capacitance and PSRR and Input

Capacitance sections for the proper use of an input capacitor and its effect on circuit

performance, in particular PSRR. The LT3046 withstands reverse voltages on IN with

respect to GND, OUTS, and OUT. In the case of a reversed input, which occurs if a

battery is plugged-in backwards, the LT3046 acts as if a diode is in series with its input.

Therefore, no reverse-current flows into the LT3046 and no negative voltage appears

at the load. The device protects itself and the load.

EN/UV

Enable and UVLO. Pulling the EN/UV pin low moves the LT3046 to shutdown mode.

Quiescent current in shutdown mode drops to 26μA and the output voltage turns off.

Alternatively, the EN/UV pin can set an input supply undervoltage lockout (UVLO)

threshold by using a resistor divider between IN, EN/UV, and GND. The LT3046 typically

turns on when the EN/UV voltage exceeds 1.27V on its rising edge, with a 110mV

hysteresis on its falling edge. The EN/UV pin can be driven above the input voltage and

maintain proper functionality. If unused, connect EN/UV to IN. Do not float the EN/UV

pin.

DNC

Do not connect.

Power Good. PG is an open-drain flag that indicates output voltage regulation. PG

pulls low if PGFB is less than 298mV. If the power good functionality is not needed,

float the PG pin. A parasitic substrate diode exists between PG and GND pins of the

LT3046; therefore, do not drive PG more than 0.3V below GND during normal operation

or during a fault condition. The PG flag status is valid even if the LT3046 is in shutdown

with the PG pin being pulled low.

ILIM

Current Limit Programming Pin. Connecting a resistor between ILIM and GND

programs the current limit. For best accuracy, Kelvin connect this resistor directly to

the GND pin of the LT3046. The programming scale factor is nominally 150mA x kΩ.

The ILIM pin sources current proportional (1:520) to the output current. Therefore, ILIM

also serves as a current monitoring pin with a 0V to 290mV range. If the programmable

current limit functionality is not needed, connect ILIM to GND. A parasitic substrate

diode exists between the ILIM and GND pins of the LT3046; therefore, do not drive ILIM

more than 0.3V below GND during normal operation or during a fault condition.

PGFB

Power Good Feedback. The PG pin pulls high if PGFB increases beyond 298mV on its

rising edge, with 7mV hysteresis on its falling edge. Connecting an external resistor

divider between OUT, PGFB, and GND sets the programmable power good threshold

with the following transfer function: 0.298V × (1 + RPG2/RPG1). As discussed further in the

Fast Startup section, PGFB also activates the fast start-up circuitry. Connect PGFB to IN

if the power good and fast start-up functions are not needed. In addition, if reverse

input protection is additionally required, connect the anode of a 1N4148 diode to IN

and its cathode to PGFB. See Figure 77 for further details. A parasitic substrate diode

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