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CMM2321

Preliminary Product Information - April 1997

(2 of 4)

Gain vs Frequency

Frequency, GHz

2.40

2.45

2.50

22

18

19

20

21

3.6 V

4.5 V

4.8 V

Saturated Power Output vs Frequency

(PIN = +14 dBm)

Frequency, GHz

16

21

26

31

2.40

2.45

2.50

3.6 V

4.5 V

4.8 V

36

Power Output vs Power Input @ 2.45 GHz

Power Input, dBm

16

21

26

31

36

-2

2

6

14

10

4.8 V

Efficiency vs Power Input @ 2.45 GHz

Power Input, dBm

0

25

50

75

0

2

6

14

10

4.8 V

Application Information

The CMM2321 is a two stage amplifier that requires

a positive and negative supply voltage for proper operation. It

is essential when turning on the device that the negative sup-

ply be applied before the positive supply. When turning the

device off, the positive supply should be removed before the

negative supply is removed.

The CMM2321 can be operated over a range of sup-

ply voltages and bias points. It is important that the maximum

power dissipation of the package be observed at all times.

Design Considerations

Biasing A negative voltage supply is needed to bias the gates

of the 2-stage GaAs FET power amplifier. Gate 1 bias is

applied through pin 3 (Vg1) and gate 2 bias is applied through

pin 4 (Vg2). Under most operating conditions gates 1 and 2

may be tied together. The positive supply voltage is applied to

pins 5 and 6 (Vd2) and pin 7 (Vd1). The negative voltage

supply should be adjusted to achieve a drain current of 600

mA with no RF input power to obtain a P1dB of approximate-

ly 30.5 dBm.

Matching Circuits Input and output matching circuits are

required. The schematic and the PCB layout for the test board

are shown on Page 3. The matching circuits for the

CMM2321 are highlighted on the PCB layout.

A single shunt capacitor is used to match the output.

Their placement and value provide tuning. Vd2 is fed through

a

λ/4 trace. All other capacitors shown in the schematic are

used for decoupling.

Note: Circuit board 8251 is a multiple-use test board.

The portions of the board that are used with the CMM2321

are shown as solid traces on the board layout drawing on Page

3. The interface/conversion points in the evaluation board

schematic are shown. These connection points may not be

labeled identically on Celeritek’s PB-CMM2321 evaluation

board. Contact the factory for assistance in translating the

external match to a specific application.

Supply Ramping To obtain the necessary power ramp, sup-

ply side switching should be used. Both drain voltages should

be tied together and ramped to produce the required power vs.

time response.

Thermal

1. The copper pad on the backside of the CMM2321 must be

soldered to the ground plane.

2. All 8 leads of the package must be soldered to the appropri-

ate electrical connection.

3. A large ground plane area with plated thru-holes as shown

on the PCB layout should be used as a backside connection.

Contact the factory for a copy of a manufacturing application

note containing more detailed information.

Typical Performance