USB3300_06 datasheet(38/49 Pages) SMSC

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Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface

Datasheet

Revision 1.06 (07-19-06)

SMSC USB3300

DATASHEET

6.1.10.1

3pin FS/LS Serial Mode

Three pin serial mode utilizes the data bus pins for the serial functions shown in Table 6.7.

6.1.11

Reset Pin

The reset input of the USB3300 may be asynchronously asserted and de-asserted so long as it is held

in the asserted state continuously for a duration greater than one clkout clock cycle. The reset input

may be asserted when the USB3300 clkout signal is not active (i.e. in the suspend state caused by

asserting the SuspendM bit) but reset must only be de-asserted when the USB3300 clkout signal is

active and the reset has been held asserted for a duration greater than one clkout clock cycle. No

other PHY digital input signals may change state for two clkout clock cycles after the de-assertion of

the reset signal.

6.2

Hi-Speed USB Transceiver

The SMSC Hi-Speed USB 2.0 Transceiver consists of four blocks in the lower right corner of

Figure 6.1. These four blocks are labeled HS XCVR, FS/LS XCVR, Resistors, and Bias Gen.

6.2.1

High Speed and Full Speed Transceivers

The USB3300 transceiver meets all requirements in the USB 2.0 specification.

The receivers connect directly to the USB cable. This block contains a separate differential receiver

for HS and FS mode. Depending on the mode, the selected receiver provides the serial data stream

through the multiplexer to the RX Logic block. The FS mode section of the FS/HS RX block also

consists of a single-ended receiver on each of the data lines to determine the correct FS linestate. For

HS mode support, the FS/HS RX block contains a squelch circuit to insure that noise is never

interpreted as data.

The transmitters connect directly to the USB cable. The block contains a separate differential FS and

HS transmitter which receive encoded, bit stuffed, serialized data from the TX Logic block and transmit

it onto the USB cable.

6.2.2

Termination Resistors

The USB3300 transceiver fully integrates all of the USB termination resistors. The USB3300 includes

1.5kΩ pull-up resistors on both DP and DM and a 15kΩ pull-down resistor on both DP and DM. The

45Ω high speed termination resistors are also integrated. These resistors require no tuning or trimming

by the Link. The state of the resistors is determined by the operating mode of the PHY. The possible

valid resistor combinations are shown in Table 6.8. Operation is guaranteed in the configurations given

in the table below.

Table 6.7 Pin Definitions in 3 pin Serial Mode

SIGNAL

CONNECTED

DIRECTION

DESCRIPTION

tx_enable

DATA[0]

Active High transmit enable

data

DATA[1]

I/O

Tx differential data on DP/DM when tx_enable is high

RX differential data from DP/DM when tx_enable is low

se0

DATA[2]

I/O

Tx SE0 on DP/DM when tx_enable is high

RX SE0 from DP/DM when tx_enable is low

interrupt

DATA[3]

OUT

Asserted when any unmasked interrupt occurs. Active high

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