EMC2101-R-ACZL-TR datasheet(39/55 Pages) SMSC

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SMBus Fan Control with 1°C Accurate Temperature Monitoring

Datasheet

SMSC EMC2101

Revision 2.53 (03-13-07)

DATASHEET

6.14

TACH Reading Registers

The TACH Registers hold the 16-bit TACH Reading. This reading represents the number of TACH

counts detected. The RPM of the fan can be determined by Equation [3] (see also Appendix B). The

bit weighting of each TACH[15:0] bit is shown in parenthesis after the value. When determining the

final fan speed, the TACH[15:0] bits need to be decoded into an equivalent decimal number.

6.15

TACH Limit Registers

The TACH Limit Registers store the maximum TACH count that the fan is expected to operate at.

TACH count is inversely proportional to the actual fan speed. This limit is used to guarantee that the

fan has spun up properly. If the measured TACH is higher than this limit (indicating that the fan speed

is lower than the minimum RPM value), then the TACH bit is set in the Status Register.

Additionally if the measured TACH count exceeds this limit, depending on the status of the

TACH_M[1:0] bits (see Section 6.16), the TACH reading registers may be forced to FFFFh.

0.33

0.43

1.00

2.33

Disabled

Automatic detection

Table 6.16 TACH Reading Registers

ADDR

R/W

DEFAULT

46h

TACH Reading

Low Byte

TACH7

(128)

TACH6

(64)

TACH5

(32)

TACH4

(16)

TACH3

(8)

TACH2

(4)

TACH1

(2)

TACH0

(1)

FFh

47h

TACH Reading

High Byte

TACH15

(32768)

TACH14

(16384)

TACH13

(8192)

TACH12

(4096)

TACH11

(2048)

TACH10

(1024)

TACH9

(512)

TACH8

(256)

FFh

Where: TACH_COUNT is the

decimal representation of the

TACH[13:0] bits.

[3]

Table 6.17 TACH Reading Low Byte Register

ADDR

R/W

DEFAULT

48h

R/W

TACH Limit

Low Byte

TACH_

FFh

49h

R/W

TACH Limit

High Byte

TACH_

L15

TACH_

L14

TACH_

L13

TACH_

L12

TACH_

L11

TACH_

L10

TACH_

FFh

Table 6.15 CPU Beta Values (continued)

ENABLE

MINIMUM BETA

RPM

5400 000

TACH

_COUNT

--------------------------------------------

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