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AM29PDL129H датащи(PDF) 37 Page - Advanced Micro Devices |
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AM29PDL129H датащи(HTML) 37 Page - Advanced Micro Devices |
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37 / 49 page ![]() November 2, 2005 Am29PDL129H 35 AC CHARACTERISTICS Hardware Reset (RESET#) Note: Not 100% tested. Parameter Description All Speed Options Unit JEDEC Std tReady RESET# Pin Low (During Embedded Algorithms) to Read Mode (See Note) Max 20 µs tReady RESET# Pin Low (NOT During Embedded Algorithms) to Read Mode (See Note) Max 500 ns tRP RESET# Pulse Width Min 500 ns tRH Reset High Time Before Read (See Note) Min 50 ns tRPD RESET# Low to Standby Mode Min 20 µs tRB RY/BY# Recovery Time Min 0 ns RESET# RY/BY# RY/BY# tRP tReady Reset Timings NOT during Embedded Algorithms tReady CE1# or CE2#, OE# tRH CE1# or CE2#, OE# Reset Timings during Embedded Algorithms RESET# tRP tRB Figure 13. Reset Timings Note: 1. During CE1# transitions, CE2#= VIH; During CE2# transitions, CE1#= VIH |
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