AM29LV640MT110REF datasheet(39/66 Pages) AMD

39 / 66 page

February 1, 2007 26190C8

Am29LV640MT/B

D A TA

SH EET

Table 13.

Command Definitions (x8 Mode, BYTE# = V

IL)

Legend:

X = Don’t care

RA = Read Address of the memory location to be read.

RD = Read Data read from location RA during read operation.

PA = Program Address. Addresses latch on the falling edge of the WE#

or CE# pulse, whichever happens later.

PD = Program Data for location PA. Data latches on the rising edge of

WE# or CE# pulse, whichever happens first.

SA = Sector Address of sector to be verified (in autoselect mode) or

erased. Address bits A21–A15 uniquely select any sector.

WBL = Write Buffer Location. Address must be within the same write

buffer page as PA.

BC = Byte Count. Number of write buffer locations to load minus 1.

Notes:

See Table 1 for description of bus operations.

All values are in hexadecimal.

Except for the read cycle and the fourth cycle of the autoselect

command sequence, all bus cycles are write cycles.

During unlock cycles, when lower address bits are 555 or AAAh

as shown in table, address bits higher than A11 (except where BA

is required) and data bits higher than DQ7 are don’t cares.

No unlock or command cycles required when device is in read

mode.

The Reset command is required to return to the read mode (or to

the erase-suspend-read mode if previously in Erase Suspend)

when the device is in the autoselect mode, or if DQ5 goes high

while the device is providing status information.

The fourth cycle of the autoselect command sequence is a read

cycle. Data bits DQ15–DQ8 are don’t care. See Autoselect

Command Sequence on page 28 for more information.

The device ID must be read in three cycles. The data is 01h for

top boot and 00h for bottom boot

If WP# protects the top two address sectors, the data is 98h for

factory locked and 18h for not factory locked. If WP# protects the

bottom two address sectors, the data is 88h for factory locked and

08h for not factor locked.

10. The data is 00h for an unprotected sector group and 01h for a

protected sector group.

11. The total number of cycles in the command sequence is

determined by the number of bytes written to the write buffer. The

maximum number of cycles in the command sequence is 37,

including "Program Buffer to Flash" command.

12. Command sequence resets device for next command after

aborted write-to-buffer operation.

13. The Unlock Bypass command is required prior to the Unlock

Bypass Program command.

14. The Unlock Bypass Reset command is required to return to the

read mode when the device is in the unlock bypass mode.

15. The system can read and program in non-erasing sectors, or

enter the autoselect mode, when in the Erase Suspend mode.

The Erase Suspend command is valid only during a sector erase

operation.

16. The Erase Resume command is valid only during the Erase

Suspend mode.

17. Command is valid when device is ready to read array data or when

device is in autoselect mode.

Command Sequence

(Notes)

Bus Cycles (Notes 1–4)

First

Second

Third

Fourth

Fifth

Sixth

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Read (Note 5)

1RA

Reset (Note 6)

XXX

Manufacturer ID

AAA

555

AAA

X00

Device ID (Note 8)

AAA

555

AAA

X02

X1C

X1E

00/01

Secured Silicon Sector Factory

Protect (Note 9)

AAA

555

AAA

X06

(Note 9)

Sector Group Protect Verify

(Note 10)

AAA

555

AAA

(SA)X04

00/01

Enter Secured Silicon Sector Region

AAA

555

AAA

Exit Secured Silicon Sector Region

AAA

555

AAA

XXX

Program

AAA

555

AAA

Write to Buffer (Note 11)

AAA

555

WBL

Program Buffer to Flash

Write to Buffer Abort Reset (Note 12)

AAA

555

AAA

Unlock Bypass

AAA

555

AAA

Unlock Bypass Program (Note 13)

XXX

Unlock Bypass Reset (Note 14)

XXX

Chip Erase

AAA

555

AAA

555

AAA

Sector Erase

AAA

555

AAA

555

Program/Erase Suspend (Note 15)

XXX

Program/Erase Resume (Note 16)

XXX

CFI Query (Note 17)

1AA

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