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L320DB90VC датащи(PDF) 28 Page - Advanced Micro Devices |
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L320DB90VC датащи(HTML) 28 Page - Advanced Micro Devices |
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28 / 57 page ![]() 26 Am29LV320D December 14, 2005 DA TA SH EET icon sector command sequence. The Exit Secured Sil- icon sector command sequence returns the device to normal operation. Table 14 on page 29 shows the ad- dress and data requirements for both command se- quences. Note that the ACC function and unlock bypass modes are not available when the device en- ters the Secured Silicon sector. See also “Secured Sil- icon Sector Flash Memory Region” on page 20 for further information. Byte/Word Program Command Sequence The system may program the device by word or byte, depending on the state of the BYTE# pin. Program- ming is a four-bus-cycle operation. The program com- mand sequence is initiated by writing two unlock write cycles, followed by the program set-up command. The program address and data are written next, which in turn initiate the Embedded Program algorithm. The system is not required to provide further controls or timings. The device automatically provides internally generated program pulses and verifies the pro- grammed cell margin. Table 14 on page 29 shows the address and data requirements for the byte program command sequence. Note that the autoselect, Se- cured Silicon sector, and CFI modes are unavailable while a programming operation is in progress. When the Embedded Program algorithm is complete, the device then returns to the read mode and ad- dresses are no longer latched. The system can deter- mine the status of the program operation by using DQ7, DQ6, or RY/BY#. Refer to “Write Operation Sta- tus” on page 30 for information on these status bits. Any commands written to the device during the Em- bedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program operation. The program command sequence should be reinitiated once the device returns to the read mode, to ensure data integrity. Programming is allowed in any sequence and across sector boundaries. A bit cannot be programmed from “0” back to a “1.” Attempting to do so may cause the device to set DQ5 = 1, or cause the DQ7 and DQ6 status bits to indicate the operation was suc- cessful. However, a succeeding read shows that the data is still “0.” Only erase operations can convert a “0” to a “1.” Unlock Bypass Command Sequence The unlock bypass feature allows the system to pro- gram bytes or words to the device faster than using the standard program command sequence. The unlock bypass command sequence is initiated by first writing two unlock cycles. This is followed by a third write cycle containing the unlock bypass command, 20h. The device then enters the unlock bypass mode. A two-cycle unlock bypass program command sequence is all that is required to program in this mode. The first cycle in this sequence contains the unlock bypass pro- gram command, A0h; the second cycle contains the program address and data. Additional data is pro- grammed in the same manner. This mode dispenses with the initial two unlock cycles required in the stan- dard program command sequence, resulting in faster total programming time. Table 14 on page 29 shows the requirements for the command sequence. During the unlock bypass mode, only the Unlock By- pass Program and Unlock Bypass Reset commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock bypass reset com- mand sequence. The first cycle must contain the data 90h. The second cycle need only contain the data 00h. The device then re turns to the read mode. The device offers accelerated program operations through the WP#/ACC pin. When the system asserts VHH on the WP#/ACC pin, the device automatically en- ters the Unlock Bypass mode. The system may then write the two-cycle Unlock Bypass program command sequence. The device uses the higher voltage on the WP#/ACC pin to accelerate the operation. Note that the WP#/ACC pin must not be at V HH any operation other than accelerated programming, or device dam- age may result. In addition, the WP#/ACC pin must not be left floating or unconnected; inconsistent behavior of the device may result. Figure 4, on page 27 illustrates the algorithm for the program operation. Refer to the table “Erase and Pro- gram Operations” on page 41 for parameters, and Fig- ure 18, on page 42 for timing diagrams. |
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