LM339 datasheet(6/10 Pages) PHILIPS

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Philips Semiconductors

Product specification

LM139/239/239A/339/339A/

LM2901/MC3302

Quad voltage comparator

1995 Nov 27

DC AND AC ELECTRICAL CHARACTERISTICS

V+=5VDC, LM139: –55°C ≤ TA ≤ 125°C; LM239/239A: –25°C ≤ TA ≤ 85°C; LM339/339A: 0°C ≤ TA ≤ 70°C; LM2901: –40°C ≤ TA ≤ 125°C,

MC3302: –40

°C ≤ TA ≤ 85°C, unless otherwise specified.

SYMBOL

PARAMETER

TEST CONDITIONS

LM2901

MC3302

UNIT

SYMBOL

PARAMETER

TEST CONDITIONS

Min

Typ

Max

Min

Typ

Max

UNIT

VOS

Input offset voltage2

TA=25°C

Over temp.

±2.0

±9

±7.0

±15

±3.0

±20

±40

VCM

Input common–mode voltage

range3

TA=25°C

Over temp.

V+–1.5

V+–2.0

V+–1.5

V+–2.0

VIDR

Differential input voltage1

Keep all

VINs≥0VDC

(or V– if need)

V+

IBIAS

Input bias current4

IIN(+) or IIN(–) with output in

linear range

TA=25°C

Over temp.

200

250

500

1000

IIN(+)–IIN(–)

IOS

Input offset current

TA=25°C

±5

±50

±5

±100

Over temp.

±50

±200

±300

IOL

Output sink current

VIN(–)≥1VDC, VIN(+)=0,

VO≤1.5VDC,

TA=25°C

6.0

VIN(+)≥1VDC, VIN(–)=0

VO=5VDC,

Output leakage current

TA=25°C

0.1

VO=30VDC,

over temp.

1.0

µA

RL=∞ on all comparators,

1.8

ICC

Supply current

TA=25°C

0.8

2.0

RL=∞ on all comparators, V+=30V

1.0

2.5

Voltage gain

RL≥15kΩ,

V+=15VDC

100

V/mV

VOL

Saturation voltage

VIN(–)≥1VDC, VIN(+)=0,

ISINK≤4mA

TA=25°C

Over temp.

400

700

150

400

700

tLSR

Large–signal response time

VIN=TTL logic swing, VREF=1.4VDC,

VRL=5VDC, RL=5.1kΩ, TA=25°C

300

Response time5

VRL=5VDC, RL=5.1kΩ,

TA=25°C

1.3

µs

NOTES:

1. Positive excursions of input voltage may exceed the power supply level by 17V. As long as the other voltage remains within the

common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than –0.3VDC (or

0.3VDC below the magnitude of the negative power supply, if used).

2. At output switch point, VO ≈ 1.4VDC, RS=0Ω with V+ from 5VDC to 30VDC; and over the full input common–mode range (0VDC to

V+ – 1.5VDC). Inputs of unused comparators should be grounded.

3. The input common–mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of

the common–mode voltage range is V+ – 1.5V, but either or both inputs can go to 30VDC without damage.

4. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of

the output so no loading change exists on the reference or input lines.

5. The response time specified is for a 100mV input step with a 5mV overdrive. For larger overdrive signals, 300ns can be obtained (see typical

performance characteristics section).

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