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TLS820F3ELV33 датащи(PDF) 7 Page - Infineon Technologies AG |
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TLS820F3ELV33 датащи(HTML) 7 Page - Infineon Technologies AG |
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7 / 42 page ![]() Datasheet 7 Rev. 1.1 2023-10-16 OPTIREG™ linear TLS820F3ELV33 Low dropout linear voltage regulator with watchdog and reset General product characteristics 3 General product characteristics 3.1 Absolute maximum ratings Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. 3. Latchup robustness: class II according to AEC - Q100-04. Table 1 Absolute maximum ratings1) Tj = -40°C to 150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) 1) Not subject to production test, specified by design. Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Voltage rating Input voltage I VI -0.3 – 45 V – P_3.1.1 Enable voltage EN VEN -0.3 – 45 V – P_3.1.2 Output voltage Q VQ -0.3 – 7 V – P_3.1.3 Reset output RO VRO -0.3 – 7 V – P_3.1.4 Delay voltage D VD -0.3 – 7 V – P_3.1.5 Reset threshold RADJ VRADJ -0.3 – 7 V – P_3.1.6 Watchdog input WI VWI -0.3 – 7 V – P_3.1.7 Watchdog output WO VWO -0.3 – 7 V – P_3.1.8 Watchdog inhibit WINH VWINH -0.3 – 7 V – P_3.1.9 Temperature Junction temperature Tj -40 – 150 °C – P_3.1.10 Storage temperature Tstg -55 – 150 °C – P_3.1.11 ESD robustness ESD robustness to GND VESD,HBM -2 – 2 kV 2) HBM all pins 2) Human body model (HBM) robustness according to AEC-Q100-002. P_3.1.12 ESD robustness to GND VESD,CDM -500 – 500 V 3) CDM all pins except 1, 7, 8, 14 3) Charged device model (CDM) robustness according to AEC-Q100-011 Rev-D; voltage level refers to test condition (TC) mentioned in the standard. P_3.1.13 ESD robustness pins 1, 7, 8, 14 to GND VESD,CDM -750 – 750 V 3) CDM P_3.1.14 |
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