SMSC KBC1122

PRODUCT PREVIEW

Revision 0.8 (02-06-07)

Data Brief

PRODUCT FEATURES

KBC1122/KBC1122P

Mobile KBC with Super I/O,

SFI, ADC and DAC with

3.3V Operation with 5V Tolerant Buffers

ACPI 1.0b/2.0 and PC99a/PC2001 Compliant

LPC Interface with Clock Run Support

— Serial IRQ Interface Compatible with Serialized

IRQ Support for PCI Systems

— 15 Direct IRQs

— Three 8-Bit DMA Channels

— ACPI SCI Interface

—nSMI

— Shadowed write only registers

LPC/Firmware Hub Host Flash Interface

— Single Byte FWH Memory Read and FWH

Memory Write Support

— FWH ID Support

— 16MB FWH Flash and Register Addressing,

128K Legacy BIOS Addressing

— Single Byte LPC Memory Read and LPC Memory

Write Support

Serial Peripheral Interface (SPI)

— 3-pin Full Duplex serial communication interface.

— Dual Ported Controller with Keeper Circuit

8 MByte Shared FlashROM Interface (SFI)

— 8051/Host CPU Hardware Arbitrated Interface

— 0.5 - 8MB - Host System BIOS & 8051 Keyboard

— 8051 64KB Code Space Accessible as Separate

32KB Pages in Flash

— Low-Power Flash Access Modes

— 8051-Programmable Flash Access Protection

– Read/Write/No-Access Protection

– Variable Bank Sizes

Host Flash Address Redirection for Recovery

Serial Flash Programming Interface

Two Power Planes

— Low Standby Current in Sleep Mode

— Intelligent Auto Power Management for Super I/O

— Main powered blocks power supplied by standby

power plane and controlled by power

management signals

3-Port ACPI Embedded Controller Interface

Configuration Register Set

— Compatible with ISA Plug-and-Play Standard

(Version 1.0a)

— Four Pin Selectable Addressing Options

— 8051-Programmable Base Address

High-Performance Embedded 8051 Keyboard and

System Controller

— Provides System Power Management

— System Watch Dog Timer (WDT)

— 8042 Style Host Interface Relocatable to 480

Different Base I/O Addresses

— Supports Interrupt and Polling Access

— Interrupt Accelerator

— 512 Bytes Data RAM

— 2 Kilobytes Scratch ROM/RAM

— On-Chip Memory-Mapped Control Registers

— Up to 18x8 Keyboard Scan Matrix

— Two 16 Bit Timer/Counters

— Eleven 8051 Interrupt Sources

— Thirty-Two 8-Bit, Host/8051 Mailbox Registers

— Thirty-six Maskable Hardware Wake-Up Events

—Fast GATEA20

— Fast CPU_RESET

— Multiple Clock Sources and Operating

Frequencies up to 32MHz

— IDLE and SLEEP Modes

— Low Power Fail-Safe Ring Oscillator ±10%

Accuracy

— Hibernation Timer with programmable wake-up

from 0.5ms to 128 minutes

— 8051-Driven 16550A UART

– 16-Byte Send/Receive FIFOs

– External Baud Clock Option

— Power-Fail Status Register

Advanced Infrared Communications Controller (IRCC

2.0)

— IrDA V1.2 (4Mbps), HPSIR, ASKIR, Consumer IR

Support

—Two IR Ports

— Relocatable Base I/O Address