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TPL9201

8-CHANNEL RELAY DRIVER

WITH INTEGRATED 5-V LDO AND ZERO-VOLT DETECTION

SLIS123B – JUNE 2006 – REVISED NOVEMBER 2006

PINOUT CONFIGURATION

NO.

NAME

I/O

DESCRIPTION

1

ZVS

O

Zero-voltage synchronization

2

OUT1

O

Low-side output 1

3

OUT2

O

Low-side output 2

4

OUT3

O

Low-side output 3

5

OUT4

O

Low-side output 4

6

OUT5

O

Low-side output 5

7

OUT6

O

Low-side output 6

8

OUT7

O

Low-side output 7

9

OUT8

O

Low-side output 8

GND

I

Ground

GND

I

Ground

12

EN1

I

Enable/disable for OUT1

13

O

Power-up reset delay

RST

I/O

Power-on reset output (open drain, active low)

15

MOSI

I

Serial data input

16

NCS

I

Chip select

17

SCLK

I

Serial clock for data synchronization

18

O

Regulated output

19

I

Unregulated input voltage source

20

SYN

I

AC zero detect input

(1)

Terminals 10 and 11 are fused internally in the lead frame for the 20-pin PDIP package.

(2)

Terminal 14 can be used as an input or an output.

2

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