Philips Semiconductors

Product specification

GTL2004

Quad GTL/GTL+ to LVTTL/TTL

bidirectional latched translator

2

1999 Jul 19

853–2165 21984

FEATURES

DESCRIPTION

The GTL2004 is a quad translating transceiver designed for 3.3V

The direction pin allows the part to function as either a GTL to TTL

sampling receiver or as a TTL to GTL interface. Separate latch

enables allow sampling and holding of data from the GTL bus.

PIN CONFIGURATION

16

15

14

13

12

10

11

9

8

7

6

5

4

3

2

1

A0

LE3

GTLREF

B3

B2

B1

B0

DIR

GND

A3

LE2

A2

LE1

A1

LE0

SW00318

PIN DESCRIPTION

PIN NUMBER

SYMBOL

NAME AND FUNCTION

15

DIR

Direction control input

1, 3, 5, 7

A0 – A3

Data inputs/outputs (A side, GTL)

11, 12, 13, 14

B0 – B3

Data inputs/outputs (B side, TTL)

2, 4, 6, 9

LE0 – LE3

Latch enables

10

GTLREF

GTL reference voltage

8

GND

Ground (0V)

16

Positive supply voltage

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

SYMBOL

PARAMETER

B to A

A to B

UNIT

Propagation delay

An to Bn or Bn to An

2.0

1.8

4.4

4.7

ns

Input capacitance DIR, LEn

3.0

3.0

pF

I/O pin capacitance

7.2

4.6

pF

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

DWG NUMBER

16-Pin Plastic TSSOP Type II

–40

°C to +85°C

GTL2004 PW DH

SOT403-1