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AM263P4 датащи(PDF) 100 Page - Texas Instruments |
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AM263P4 датащи(HTML) 100 Page - Texas Instruments |
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100 / 154 page ![]() 6.11.5.4.3 EQEP Switching Characteristics (3) NO. PARAMETER DESCRIPTION MIN MAX UNIT QEP6 td(CNTR)xin Delay time, external clock to counter increment 4 + U(2) + 6P(1) ns QEP7 td(PCS-OUT)QEP Delay time, QEP input edge to position compare sync output 4 + U(2) + 7P(1) + 4 ns (1) P = sysclk period in ns. (2) U = the input qualifier sampling window. See GPIO Electrical Data and Timing section for details on Input Qualifier Mode. (3) Some EQEP signals are pinmuxed with I2C0 SDA and SCl pins. These pins use an alternate open drain voltage buffer and may not meet the specified parameters. Values are pending additional post-silicon validation. TI Information - Selective Disclosure AM263P4, AM263P2, AM263P1, AM263P4-Q1, AM263P2-Q1, AM263P1-Q1 SPRSP81 – OCTOBER 2023 www.ti.com 100 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated |
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